Compact semiconductor device using SOI.cndot.CMOS technology

Details Compact semiconductor device using SOI.cndot.CMOS technology Compact semiconductor device using SOI.cndot.CMOS technology

1998-06-17

2000-05-30

Crane, Sara

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

Having specific type of active device

257206, 257351, 257371, H01L 2710

Patent

active

060693738

ABSTRACT:
A square measure of a basic cell and a basic circuit cell of a semiconductor device used a SOI.cndot.CMOS technology is reduced. In the semiconductor device used a SOI.cndot.CMOS technology, the basic cells constituted by two pieces of PMOS and two pieces of NMOS are arranged in order of the PMOS, the PMOS, the NMOS and NMOS or NMOS, the NMOS, the PMOS and the PMOS in a row, and the diffused layer of a portion on which the PMOS and the NMOS adjoin are formed in a manner to adjoin directly. Moreover, the power source wiring and the grounding wiring are arranged around the basic cell in a manner to being held in common with the adjacent cells, and at least one of PMOS diffused layers is arranged so as to be able to be connected with a power source wiring through a contact directly and at least one of NMOS diffused layers is arranged so as to be able to be connected with a grounding wiring through a contact directly.

REFERENCES:
patent: 3999214 (1976-12-01), Cass
patent: 4771327 (1988-09-01), Usui
patent: 4870471 (1989-09-01), Ohkura
patent: 5031018 (1991-07-01), Shirato et al.
patent: 5604360 (1997-02-01), Zhang et al.
patent: 5744822 (1998-04-01), Takayama et al.
patent: 5789781 (1998-08-01), McKitterick

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