Patent
1980-08-06
1983-08-02
Davie, James W.
357 20, 357 41, 357 59, H01L 2906, H01L 2978, H01L 2702, H01L 2904
Patent
active
043969305
ABSTRACT:
A semiconductor device and a method for manufacturing the same are disclosed wherein an insulating thin film is formed on the surface of a semiconductor substrate, a gate electrode region of conductivity type different from that of the semiconductor substrate is selectively formed within the substrate and contiguous with the surface of the substrate, and source and drain regions are formed at the upper portion of the insulating thin film so that the voltage applied to the gate electrode region is below the reverse-breakdown voltage across a PN junction between the semiconductor substrate and the gate electrode region and determines the electrical conductivity of the source and drain regions.
REFERENCES:
A. K. Malhotra and G. W. Neudeck, "Field-effect conductance change in amorphous silicon", Applied Physics Letters, vol. 24, No. 11 (1974) pp. 557-559.
Carroll J.
Davie James W.
Tokyo Shibaura Denki Kabushiki Kaisha
LandOfFree
Compact MOSFET device with reduced plurality of wire contacts does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Compact MOSFET device with reduced plurality of wire contacts, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Compact MOSFET device with reduced plurality of wire contacts will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-486663