Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
2000-03-02
2004-03-09
Jung, Min (Department: 2663)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S388000
Reexamination Certificate
active
06704307
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to digital switching technology in general and, more particularly, to a compact, very high-capacity switch for use in an optical transport network.
BACKGROUND OF THE INVENTION
The ever-increasing popularity of the Internet as a vehicle for transmitting information of all sorts, including electronic mail messages, voice conversations, photographs, data files and live broadcasts, has led to an explosion in the volume of digital traffic travelling on today's backbone of mainly low-capacity (e.g., OC-3 and OC-48) links. The expression “OC-x” is used to denote “optical carrier” and refers to a digital optical signal having a rate of “x” times the basic rate of 51.84 Mbps, where “x” can typically take on the values 3, 12, 48 or 192. Thus, for example, an OC-48 signal has a rate of 2.488 Gbps, which is approximately equal to 2.5 Gbps or 2.5 billion bits per second.
The demand for greater network capacity brought on largely by the advent of the information age has led to the introduction of OC-192 links as well as a technology known as WDM or wavelength division multiplexing. In WDM, multiple individual optical carriers—be they OC-3 signals, OC-48 signals, OC-192 signals or any other type of signal—each occupy distinct wavelengths of light along a span of fiber optic cable. As multiple wavelengths are independently occupied by various signals, the amount of information carried by a single optical fiber can be dramatically increased with respect to the usual case in which only a single wavelength of light is used.
It is anticipated that future transport capabilities will be on the order of several terabits per second (Tbps, equal to 10
12
bits per second) per fiber. At the transport level, this will likely be accommodated through the use of WDM with
100
or more wavelengths on a single fiber, and with each wavelength carrying an OC-192 feed (i.e., a digital optical signal at approximately 10 Gbps). If a large number of such multi-wavelength fibers pass through a network node, the switching equipment at the node will be required to support capacities in the multi-terabit-per-second range in order to provide sufficient switching granularity for interconnecting wavelengths from each span in a non-blocking manner. However, conventionally available technology does not allow such extremely high switching capacities to be achieved.
That is to say, while there has been a rapid evolution of WDM-enabled transport technology to the point where currently used techniques are expected to adequately support future transport requirements, the field of switching technology has not experienced improvements of a similar magnitude. As a result, the telecommunications industry currently lacks access to switches capable of cross-connecting several hundred or several thousand multi-gigabit-per-second feeds in accordance with an arbitrary mapping in a non-blocking way to achieve switching capacities in the multi-terabit-per-second range.
In the quest for extremely high switching capacity, current telecommunications service providers may suggest extending the very concepts which have brought switching technology to its present state. However, such concepts, which include time-division multiplexing, time switching and space switching, are not easily adapted to handle the switching of multiple signals contemporaneously sharing the same transmission medium (as is generally the case in a WDM scenario). Furthermore, a straightforward extension of currently used switching techniques into the terabit-per-second range leads to central office equipment having an unacceptably high power consumption largely as a result of a grossly impractical physical volume.
Thus, when faced with a need to switch multiple terabits of digital information per second inside a reasonable volume and within reasonable limits of power consumption, it is apparent that reliance cannot be placed upon conventionally available switching technology.
SUMMARY OF THE INVENTION
The present invention provides a solution to the above-mentioned problems inherent to currently used switching technologies, by providing a high-capacity switch, capable of operation in at least the multi-Tbps range, that is sufficiently compact to fit into a single equipment shelf.
According to the invention, the implementational difficulties associated with constructing large commutative switches are alleviated by distributing the functionality of various elements of a large conceptual commutative switch among multiple circuit cards.
Thus, the invention may be summarized as a switching unit, equipped with a plurality of port cards and a plurality of switch cards. Each port card has at least one first M-way commutator and a corresponding number of second M-way commutators, wherein the total number of first M-way commutators over all the port cards is N and wherein the total number of second M-way commutators over all the port cards is also N. Each switch card has at least one first N-way commutator and a corresponding number of second N-way commutators, wherein the total number of first N-way commutators over all the switch cards is M and wherein the total number of second N-way commutators over all the switch cards is also M.
Each switch card further has a unit for controllably time switching a plurality of signals output by each first N-way commutator and providing a plurality of switched signals to the corresponding second N-way commutator. The mth output of the nth first M-way commutator is connected to the nth input of the mth first N-way commutator and wherein the nth output of the mth second N-way commutator is connected to the mth input of the nth second M-way commutator, for 1<=m<=M and 1<=n<=N.
Preferably, the N-way commutators and the N-way commutators have harmonically related commutation step rates, whereby the first N-way commutators on the port cards and the first N-way commutators on the switch cards work as a P-way commutator and whereby the second N-way commutators on the port cards and the second N-way commutators on the switch cards work as a P-way commutator, where P=M*N.
Preferably, the port cards are substantially parallel to one another, wherein the switch cards are substantially parallel to one another and wherein the normal to any port card and the normal to any switch card are not parallel.
Preferably, the port cards are substantially parallel to one another, wherein the switch cards are substantially parallel to one another and wherein the port cards are substantially orthogonal to the switch cards.
Preferably, the switching unit is further equipped with a mid-plane connected to the port cards and to the switch cards, wherein the connections between the first M-way commutators and the first N-way commutators and the connections between the second N-way commutators and the second M-way commutators are provided by electrical paths through the mid-plane.
Preferably, the commutators and the time switching units cooperate to provide non-blocking time and space switching of signals at the inputs of the first M-way commutators.
The invention may also be summarized as a port card or a switch card as described above.
The invention may also be summarized as a compound commutator equipped with a plurality N of first commutators distributed among a plurality of substantially parallel first circuit cards, each first commutator having M inputs, M outputs and a common first commutation step rate, and a plurality M of second commutators distributed among a plurality of substantially parallel second circuit cards, each second commutator having N inputs, N outputs and a common second commutation step rate. The mth output of the nth first commutator is connected to the nth input of the mth second commutator for all 1<=m<=M and 1<=n<=N. The first and second commutation step rates are harmonically related and the normal to any first circuit card and the normal to any second circuit card are not parallel.
REFERENCES:
patent:
Bragg Nigel L.
Graves Alan F.
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