Compact co-packaged semiconductor dies with...

Details Compact co-packaged semiconductor dies with... Compact co-packaged semiconductor dies with...

2011-03-15

2011-03-15

Thai, Luan C (Department: 2891)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C438S123000, C257S502000, C257SE23043, C257SE23037

Reexamination Certificate

active

07906375

ABSTRACT:
A semiconductor package is disclosed for packaging two adjacent semiconductor dies atop a circuit substrate. The dies are separated from each other along their longitudinal edges with an inter-die distance. An elevation-adaptive electrical connection connects a top metalized contact of die two to the bottom surface of die one while accommodating for elevation difference between the surfaces. The elevation-adaptive electrical connection includes:a) An L-shaped circuit route that is part of the circuit substrate, extending transversely from a die one longitudinal edge and placing an intermediate contact area next to a die two transverse edge.b) An interconnection plate connecting the top metalized contact area of die two with the intermediate contact area while being formed to accommodate for elevation difference between the contact areas.Consequently, the semiconductor package reduces the inter-die distance from an otherwise direct transverse circuit routing between the longitudinal edges of the dies.

REFERENCES:
patent: 6919644 (2005-07-01), Uchida

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