Pulse or digital communications – Repeaters – Testing
Patent
1980-01-02
1981-11-10
Safourek, Benedict V.
Pulse or digital communications
Repeaters
Testing
375 14, 375 94, H04K 104
Patent
active
043002358
ABSTRACT:
A spread spectrum communication system comprising a convolver to one end of which a message is fed comprising a plurality of bits, the convolver being long enough in the direction of signal propagation therethrough to store contemporaneously two message bits each of which comprises a plurality of sub-bits or chips having a predetermined sequence, signal generator means operative to generate reference bits, at one to one mark space ratio, each reference bit comprising chips or sub-bits corresponding to the reverse of the said predetermined sequence, the generator means being arranged to feed the other end of the said convolver with the reference bits so that when a reference bit travelling in one direction passes a corresponding message bit travelling in the opposite direction a `match` occurs and an output pulse is delivered from the convolver, gating means via which rectified output pulses from the convolver are fed to a clocked tapped analogue shift register or clocked tapped delay line means, a gating signal generator for producing a gating signal to which the gating means is responsive so that output pulses from the convolver produced during times when a reference bit is partly in or partly out of the convolver are not passed to the said analogue shift register or delay line means, a clock pulse generator to which the said analogue shift register or delay line means is responsive so that data from the convolver is clocked therethrough and further gating means via which signals from the clock pulse generator are applied to the clocked tapped analogue shift register or clocked tapped delay line means, said further gating means being responsive also to the gating signal or to a corresponding signal so that the clock pulses are not applied to the clocked tapped analogue shift register or clocked tapped delay line means, during those times when a reference bit is partly in or partly out of the convolver.
REFERENCES:
patent: 3648237 (1972-03-01), Frey
patent: 3823377 (1974-07-01), Keane
patent: 3906496 (1975-09-01), Goodrich
patent: 4016514 (1977-04-01), Reeder
patent: 4156876 (1979-05-01), Debuisser
Chin Stephen
Plessey Handel und Investments AG.
Safourek Benedict V.
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