Multiplex communications – Wide area network – Packet switching
Patent
1993-09-07
1995-02-14
Hsu, Alpus H.
Multiplex communications
Wide area network
Packet switching
370 655, 370 68, 340826, 3408258, 359117, 359140, H04J 1408, H04Q 1104
Patent
active
053901789
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
This invention relates to communications switching networks, particularly but not exclusively to networks adapted to handle optical communications signals such as may arise, for example, in optical computing.
RELATED ART
Communications switching networks are already known for time division multiplexing the blocks of a multi-block communications signal and also for space-domain switching, but the known networks are limited in the number of signals that can be handled in parallel and/or require large numbers of switches and/or attenuate the respective signals variably by an amount dependent upon the particular route through the network. When the network is adapted to handle optical signals, for example using lithium niobate switches, the switches are individually very expensive so that large numbers of switches are disadvantageous.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a new and improved form of communications switching network.
According to one aspect of the present invention there is provided a communications switching network comprising: M number of input terminals for receiving M number of multi-block communications signals in parallel, M number of output terminals for delivering M number of signals in parallel, first and second time-space-time (TST) switching nets each having M/2 input terminals and M/2 output terminals. the input terminals of the TST switching nets and the M input terminals with each switch in said first set having a first output connected to the first TST switching net and a second output connected to the second TST switching net, the output terminals of the TST switching nets and the M output terminals with each switch in said second set having a first input connected to the first TST switching net and a second input connected to the second TST switching net.
Each TST switching net may comprise first and second sets of M/2 time-slot-interchangers (TSI) interconnected by a reconfigurable space switch net having M/2 inputs and M/2 outputs. Alternatively each TST switching net may comprise the functional equivalent of the aforesaid space switch net with first and second sets of time slot interchangers, the equivalent comprising a distributed collection of interconnected switches and delay lines.
In one arrangement each TSI or its functional equivalent is an N timeslot interchanger, where N is the number of timeslots per frame in each of the signals delivered to the M input terminals of the communications switching network.
In another arrangement, each TSI or its functional equivalent is an N/2 timeslot interchanger. For example each TST switching net may further comprise a third set of M/2 number of 2.times.2 crossbar switches connected between the first set of timeslot interchangers and the first set of switches with each switch in said third set having one of its outputs directly connected to a TSI and the other of its outputs connected to a TSI via a delay line, and a fourth set of M/2 number of 2.times.2 crossbar switches connected between the second set of timeslot interchangers and the second set of switches with each switch in said fourth set having one of its inputs directly connected to a TSI and the other of its inputs indirectly connected to a TSI via a delay line.
To preserve frame integrity of the multiblock communications switching signals at the M output terminals of the communications switching network, each TST switching net or its functional equivalent further comprises a fifth set of M/2 number of 2.times.2 cross-bar switches connected between the first set of timeslot interchangers and the third set of switches with each switch in said fifth set having one of its outputs directly connected to a TSI and the other of its outputs connected to a TSI via a delay line, and a sixth set of M/2 number of 2.times.2 cross-bar switches connected between the second set of timeslot interchangers and the fourth set of switches with each switch in said sixth set having one of its inputs directly connected to a
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patent: 3965301 (1976-06-01), Kevorkian
patent: 4074077 (1978-02-01), Charransol et al.
patent: 4400627 (1983-08-01), Zola
patent: 4412322 (1983-10-01), Briley et al.
patent: 4701907 (1987-10-01), Collins
patent: 5136579 (1992-08-01), Nguyen
Hsu Alpus H.
The University of Strathclyde
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