Communications protocol processing by real time processor...

Electrical computers and digital processing systems: processing – Processing architecture – Distributed processing system

Reexamination Certificate

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Details

C700S003000, C709S230000, C712S034000

Reexamination Certificate

active

06826673

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a communication protocol processing unit, which executes a communication protocol process such as ATM, SDH, or the like by a processor.
2. Description of the Related Arts
In order to process a high-speed communication protocol in the prior art, each process in the communication protocol such as ATM, SDH, or the like is performed by a hardware configuration (Hard Wired) in a generic technology.
For this reason, each time a standard recommended specification such as ITU-T, or the like or a small-scaled specification is changed and added, it is necessary to redesign a hardware structure, which has become a problem in view of technology and cost.
Furthermore, in order to avoid such the problem, when it is considered that a processor performs the high-speed communication protocol process, an enormous band width is required for a high performance in the processor.
In particular, in the case where a plurality of connection processes such as an ATM cell process are made to handle an enormous data amount at a high speed, the realizability was made difficult from processing capability, a required band width, or the like which is demanded for the processor in performing a processor processing.
FIG. 1
is a diagram for explaining such conventional problems by mentioning the ATM cell process as an example. In the case where for an ATM cell throughput of 600 Mbps through a memory function
4
such as a memory, or the like, all functions (cell discrimination, UPC, NDC, OAM, accounting, header change, etc.) on an ATM layer of the ITU-T recommendation is executed by a processor
1
based on instructions stored in an instruction memory
3
, an enormous band width such as 10 Gbps or more
103
is required in a data transfer relative to a parameter
2
stored in a data RAM, or the like per cell process in the processor
1
in view of a handling data amount.
FIG. 1
is shown with an input
101
for an ATM cell input of communication data at 600 Mbps and an output for an ATM cell of communication data at 600 Mbps. The processor
1
is performing ATM cell processing.
Furthermore, it was demanded that a processor would have to perform a processing within 1 cell time (680 ns), etc, but it became difficult to realize such the processor capable of corresponding to such the demand.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a communication protocol processing unit capable of mitigating a necessary condition such as performance, a band width, or the like of the processor as a structural element, and performing a communication protocol process by the processor at lower costs as a whole.
According to the present invention attaining the above-described problems, a communication protocol processing unit formed by a multiprocessor has a first processor for performing a process demanding a real time property in a communication data stream; and a second processor for performing a process not demanding a real time property, wherein the first processor transfers to the second processor use parameters paired with communication data to be processed, and the second processor is configured so as to refer to the transferred communication data and parameters for processing.
Furthermore, in an preferred aspect of the communication protocol processing unit by the multiprocessor according to the present invention attaining the above-described problem, the communication protocol processing unit comprises a process queue for storing the pair of the communication data and parameters between the first and second processors.
Furthermore, in a preferred aspect of the communication protocol processing unit by the multiprocessor according to the present invention attaining the above-described object, the first processor is configured so as to generate a processing demand signal which demands a process to the second processor, before the first processor generates the process demand signal, the communication data and parameters have been previously unconditionally transferred to the process queue, and the process queue can display independently validity/invalidity of the data already transferred to the process queue according to presence or absence of the process demand signal from the first processor.
Furthermore, in a preferred aspect of the communication protocol processing unit by the multiprocessor according to the present invention attaining the above-described problem, a plurality of the first processors are provided, and are in series arranged to pipeline, and each of the plurality of first processors is demandable for processing to the second processor.
Furthermore, in a preferred aspect of the communication protocol processing unit by the multiprocessor according to the present invention attaining the above-described problem, the communication protocol processing unit further comprises a queue for storing processing results of the second processor between the first and second processors; and a selecting circuit as means for overwriting the communication data in the stream to the processing results of the second processor, wherein the first processor read-accesses the queue, and when the data are accumulated in the queue, the selection route of the selecting circuit is switched into a queue side.
The features of the present invention will become more apparent from the embodiments thereof set forth in light of the drawings.


REFERENCES:
patent: 5295265 (1994-03-01), Ducateau et al.
patent: 5450411 (1995-09-01), Heil
patent: 5621672 (1997-04-01), Kobayashi et al.
patent: 5699361 (1997-12-01), Ding et al.
patent: 2002/0163918 (2002-11-01), Cline

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