Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2011-07-26
2011-07-26
Treat, William M (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
Reexamination Certificate
active
07987340
ABSTRACT:
Data is transmitted from a sending processor over a network to one or more receiving processor in a forward direction during an allocated slot, and acknowledge signals are sent in a reverse direction during the same allocated slot, to indicate whether the receiving processor is able to receive data If one or more of the receiving processors indicates that it is unable to receive the data, the data is retransmitted during the next allocated slot. This means that the sending processor is able to determine within the slot period whether a retransmission is necessary, but that the slot period only needs to be long enough for one-way communication.
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Claydon Anthony Peter John
Duller Andrew
Orr Alex
Panesar Gajinder
Robbins William Philip
Potomac Patent Group PLLC
Treat William M
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