Multiplex communications – Pathfinding or routing – Combined circuit switching and packet switching
Reexamination Certificate
1999-07-06
2002-05-28
Ngo, Ricky (Department: 2664)
Multiplex communications
Pathfinding or routing
Combined circuit switching and packet switching
C370S395100, C370S465000, C370S522000
Reexamination Certificate
active
06396829
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to telecommunications systems that use a single communications medium to transmit both constant bit rate, circuit-like and variable bit rate, data-like traffic and, in particular, to a communications channel that uses synchronous micro-cells to integrate circuit and packet data transmissions to concurrently serve both types of transmissions.
PROBLEM
It is a problem in the field of telecommunications systems to transmit constant bit rate, circuit-like and variable bit rate, data-like traffic via a single communication medium. For example, Asynchronous Transfer Mode (ATM) is a packet oriented data transfer mode that uses an asynchronous time division multiplexing technique. The term “transfer mode” refers to a set of methods which cover transmission, multiplexing, and switching in a telecommunications environment. Asynchronous Transfer Mode networks carry telephony, video and data services over a single communications network. The Asynchronous Transfer Mode transport network is divided into two layers: an ATM Layer which involves the switching aspects of the network and the Physical Layer which involves the transmission aspects. The ATM Layer implements on-demand establishment of virtual connections between endpoints to transmit the required message(s). Therefore, the message originating party can be connected to the ATM Network, but does not consume transmission capacity until a message is originated to a designated destination.
Asynchronous Transfer Mode (ATM) technology uses a common 53 octet cell definition for both constant bit rate and variable bit rate traffic. The assignment of a cell within the cell stream to a particular virtual circuit is asynchronous to the underlying transport method, making the multiplexing of virtual circuits easy, but the simulation of delay-sensitive, constant bit rate traffic is complicated in this environment. A variety of high priority queues and jitter smoothing buffers are needed to transmit the constant bit rate traffic over the Asynchronous Transfer Mode network in a manner that emulates a circuit switched data transmission medium. Also, packet filling delay for low data rate circuits is unavoidable because of the fixed 53 byte size of the Asynchronous Transfer Mode cells.
An alternative approach is to transport data traffic from both constant bit rate sources and variable bit rate sources via IP packet streams, with reliance on overengineering of the underlying packet network and the use of readout buffers to ameliorate the delay characteristics of the underlying network. Simulating constant bit rate traffic streams via IP inherently has the same problems as the above-noted Asynchronous Transfer Mode, only with more severe delay and delay-variation characteristics. The use of only circuit switching to carry both constant bit rate and variable bit rate traffic has also been proposed in the past, but this requires rapid setup and removal of circuit connections to avoid excessive startup delays for the delivery of packets. In all cases, the use of a single data transmission medium technology (circuit switched or packet switched) results in disadvantaging the other technology (packet data or circuit data).
One proposed solution to this conundrum was disclosed in a paper titled “Adaptive Digital Access Protocol: A MAC Protocol for Multiservice Broadband Access Networks” published by James E. Dail et. al. in the March 1996 issue of IEEE Communications Magazine on pages 104-112. The Dail article proposes a protocol which supports multiservice—synchronous transfer mode and asynchronous transfer mode—applications in the context of a subscriber's access to a coaxial cable network that has a tree and branch architecture. The Dail protocol is designed to adapt to changing data transmission demands for multi-media communications by providing a variable mix of circuit and cell mode applications. The bandwidth of this data transmission system is dynamically allocated by shifting the cell boundaries in the transmission stream to accommodate the varying need for synchronous and asynchronous traffic. In the transmission stream, each frame is divided into an asynchronous and a synchronous region, with the boundary between the two regions being changed on a dynamic basis. A plurality of synchronous signals are multiplexed into the synchronous region of the frame and the asynchronous region of the frame likewise serves a plurality of multiplexed asynchronous signals. The data traffic can be any combination of constant bit rate, variable bit rate and available bit rate data. The boundary between the two regions of the frame is denoted by a unique pattern of headers prepended to the asynchronous data. However, the Dail protocol requires a significant volume of data traffic to be practical and the overhead associated with dynamically shifting the region boundary is costly.
Thus, there is presently no data transmission system that use a single communications medium technology to transmit both constant bit rate, circuit-like and variable bit rate, data-like traffic in a manner that is transparent to both types of traffic and does not result in disadvantaging the other technology (packet data or circuit data).
SOLUTION
The above described problems are solved and a technical advance achieved in the field by the present communications channel synchronous micro-cell system for integrating circuit and packet data transmissions which functions to blend both circuit and packet technology together to carry both constant bit rate and variable bit rate traffic with no added packet or jitter delay for constant bit rate traffic and no added circuit setup delay for variable bit rate traffic. This is accomplished by the use of a micro-cell structure for all information that is transmitted over a communication channel. The data stream comprises a series of frames, each of which consists of a predetermined number of micro-cells. The micro-cells are fixed in size, with a header, like Asynchronous Transfer Mode, but their similarity stops there. The header is a simple flag which indicates the type of payload that is placed in the micro-cell associated with that header. When the header indicates a payload that is synchronous with the communication medium, that micro-cell is being used as a time slot in a circuit switched sense. When the header indicates a payload that is asynchronous with the communication medium, that micro-cell is being used to transfer sub-elements of data packets, which are routed by the address data embedded in the header of the packet data, independent of the micro-cell location in the frame.
Thus, Ethernet frames are carried across the communication medium in whatever micro-cells are available for asynchronous packet use and are then marked as packet. The number of micro-cell positions available during each frame of the data stream can vary as a function of the circuit traffic load. The flow of packets are orchestrated to be staggered on the input to provide substantially equal access to the communication medium for all packet originating parties. In addition, the circuit data has priority in the assignment of micro-cells since it is real-time data and cannot be delayed in its transmission.
REFERENCES:
patent: 5774469 (1998-06-01), Wirkestrand
patent: 5802050 (1998-09-01), Petersen et al.
patent: 5809023 (1998-09-01), Petersen et al.
patent: 5822321 (1998-10-01), Petersen et al.
patent: 5978375 (1999-11-01), Petersen et al.
patent: 6061354 (2000-05-01), Morikawa et al.
Lucent Technologies - Inc.
Ngo Ricky
Patton & Boggs LLP
Tran Phuc
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