Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-07-06
2002-12-03
Patel, Ajit (Department: 2664)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C710S305000, C370S475000, C370S395100, C370S469000
Reexamination Certificate
active
06490283
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to communication systems, and, more particularly, to a communication system having a communication controller and multiple physical interfaces, and to a method.
BACKGROUND OF THE INVENTION
In many communication systems, a physical interface (e.g., a “PHY”, or “physical layer device”) connects a communication channel (e.g., fiber optic line, phone line, radio link) to a communication processor. For example, the system operates in the Asynchronous Transfer Mode (ATM) in which the channels transfer data in cells (e.g., blocks of bytes). In such cases, the communication processor (“ATM layer unit”) can be either a cell processor or a Segmentation and Reassembly (SAR) unit. Preferably, a single processor can serve multiple (e.g., n) PHYs. In the terms of ATM, processor, PHYs and channels belong to the so-called physical layer. Many references are dedicated to ATM, such as [1] Reif O. Onvural: “Asynchronous Transfer Mode, Performance Issues”, Second Edition, Artech House Boston and London, 1995, ISBN 0-89006-804-6, especially chapter 2.4 “Physical Layer”; [2] The ATM Forum, Technical Committee: “Utopia Level 2, Version 1.0”, June 1995, [FIG. 2.3B with a single ATM (communication processor) and multiple PHYs]; [3] U.S. Pat. No. 5,485,456 to Shtayer et al.; and [4] U.S. Pat. No. 5,418,786 to Loyer et al.
Coupling multiple PHYs to a single ATM layer can require additional pins to the processor and packages which is not desirable. The present invention seeks to provide systems which mitigate or avoid these and other disadvantages and limitations of the prior art.
REFERENCES:
patent: 5418786 (1995-05-01), Loyer et al.
patent: 5485456 (1996-01-01), Shtayer et al.
patent: 5742765 (1998-04-01), Wong et al.
patent: 5889778 (1999-03-01), Huscroft et al.
patent: 2303521 (1997-02-01), None
The ATM Forum Technical Committee, Utopia Level 2, Version 1.0, ac-phy-0039.000, Jun. 1995, pp. ii nd iii and pp. 1-66.
Asynchronous Transfer mode networks, Performance Issues, Second edition, Raif O. Onvural, Artech House, Boston, London pp 60-75.
Ganor Avraham
Hagai Avi
Shalev Avi
Vayzer Vadim
Jain Raj
King Robert L.
Motorola Inc.
Patel Ajit
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