Communication system

Electrical computers and digital processing systems: multicomput – Multicomputer data transferring via shared memory

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700 3, G06F 1516

Patent

active

059319020

ABSTRACT:
A communication system in which a master unit is connected to a slave unit executing initialization processing with a longer period of time for initialization as compared to that by the master unit through an extension bus and a signal line, the signal line becomes an active state according to a reset signal in a process for resetting the system, so that the slave unit executes initialization processing by detecting release of reset according to control by the microprocessor for a slave unit, and when the initialization processing is finished, the slave unit supplies an output signal to the reset signal release circuit, shifts the signal line from the active state to a high impedance state, and releases reset of the master unit.

REFERENCES:
patent: 4580232 (1986-04-01), Dugan et al.
patent: 5070450 (1991-12-01), Holman et al.
patent: 5349673 (1994-09-01), Yasuda
patent: 5434982 (1995-07-01), Calzi

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