Patent
1996-01-22
1999-05-25
Lee, Thomas C.
395882, 395885, G06F 1300
Patent
active
059077190
ABSTRACT:
A communication interface unit (128) facilitates data word exchanges between a parallel driven bus (210) and a serial driven communication channel (136) by performing both parallel-to-serial and serial-to-parallel data conversion functions. A transmitter circuit (200) is included in the communication interface unit (128), which performs parallel-to-serial data conversion employing a multiplexer circuit (204) and control logic circuitry (208). The multiplexer circuit (204) concurrently receives a plurality of data bits of a data word being transferred, and the control logic circuitry (208) thereupon causes the plurality of data bits of the data word to be successively passed through the multiplexer circuit (204) so as to perform parallel-to-serial conversion. A receiver circuit (300) may also be included in the communication interface unit (128), which performs serial-to-parallel data conversion employing a plurality of flip-flops (304) and control logic circuitry (308). The plurality of flip-flops (304) each receive a plurality of data bits of a data word being transferred, and the control logic circuitry (308) thereupon causes the plurality of data bits of the data word to be successively latched into the plurality of flip-flops (304) so as to perform serial-to-parallel conversion.
REFERENCES:
patent: 3585586 (1971-06-01), Harmon et al.
patent: 3836888 (1974-09-01), Boenke et al.
patent: 3924181 (1975-12-01), Alderson
patent: 3965343 (1976-06-01), Speiser et al.
patent: 3968335 (1976-07-01), Werner et al.
patent: 3975712 (1976-08-01), Hepworth et al.
patent: 4047159 (1977-09-01), Boudry
patent: 4068104 (1978-01-01), Werth et al.
patent: 4157458 (1979-06-01), Roche
patent: 4392221 (1983-07-01), Hesketh
patent: 4415818 (1983-11-01), Ogawa et al.
patent: 4426685 (1984-01-01), Lorentzen
patent: 4516201 (1985-05-01), Warren et al.
patent: 4607345 (1986-08-01), Mehta
patent: 4799040 (1989-01-01), Yanagi
patent: 4878215 (1989-10-01), Rogers
patent: 4899339 (1990-02-01), Shibagaki et al.
patent: 5005151 (1991-04-01), Kurkowski
patent: 5029331 (1991-07-01), Heichler et al.
patent: 5134702 (1992-07-01), Charych
patent: 5237561 (1993-08-01), Pyhalammi
patent: 5287458 (1994-02-01), Michael et al.
patent: 5345198 (1994-09-01), Jacobson
patent: 5347270 (1994-09-01), Matsuda et al.
patent: 5377265 (1994-12-01), Wettengel et al.
patent: 5390019 (1995-02-01), Fritze et al.
patent: 5550874 (1996-08-01), Lee
patent: 5561826 (1996-10-01), Davies et al.
patent: 5583574 (1996-12-01), Tanaka et al.
patent: 5598442 (1997-01-01), Gregg et al.
patent: 5625353 (1997-04-01), Katagiri et al.
patent: 5714904 (1998-02-01), Jeong
Cirrus Logic Inc.
Lee Thomas C.
Nguyen Frank D.
Okumoto Victor H.
Yuan Chien
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