Elevator – industrial lift truck – or stationary lift for vehicle – Having computer control of elevator
Reexamination Certificate
2001-10-15
2002-11-19
Salata, Jonathan (Department: 2837)
Elevator, industrial lift truck, or stationary lift for vehicle
Having computer control of elevator
C187S391000
Reexamination Certificate
active
06481532
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a communication apparatus for elevators, and more particularly to a communication apparatus applied to an elevator system that includes plural types of communication paths having different communication protocols from each other.
BACKGROUND ART
FIG. 8
shows a construction of the above type of conventional communication apparatus for elevators disclosed in Japanese Unexamined Patent Application Publication No. 10-182023, for example, and
FIG. 9
shows one example of hardware configuration of a communication relay unit
23
in FIG.
8
. Referring to
FIG. 8
,
11
A-
11
N each denote a cage controller, GNW denotes a group network to which the cage controllers
11
A-
11
N and a master communicating portion
23
A of the communication relay unit
23
are connected, and
23
denotes the communication relay unit. HNW
1
-HNWk denote hall networks to which hall terminals
14
-
15
provided for each elevator line and slave communicating portions
23
D
1
-
23
Dk of the communication relay unit
23
are connected respectively, and
26
denotes a power supply unit.
In the communication relay unit
23
,
23
A denotes the master communicating portion,
23
B denotes a source power converter,
23
C denotes a monitoring portion,
23
D
1
-
23
Dk each denote a slave communicating portion, and INW denotes an internal network for connecting the slave communicating portions
23
D
1
-
23
Dk to the master communicating portion
23
A.
Also, in the master communicating portion
23
A shown in
FIG. 9
,
300
A and
300
B denote communicating portions in parallel,
300
C denotes a switching portion,
301
A and
301
B each denote a CPU,
302
A and
302
B each denote a transmitting/receiving portion,
303
A and
303
B each denote a ROM,
304
A and
304
B each denote a RAM, and
305
A and
305
B each denote a parallel interface portion. Further, in the slave communicating portions
23
D
1
and
23
Dk,
307
A and
307
B each denote a CPU,
308
A and
308
B each denote a ROM,
309
A and
309
B each denote a DPRAM, and
310
A and
310
B each denote a transmitting/receiving portion.
The operation will be briefly described below. Two different networks GNW and HNW are connected to each other via the communication relay unit
23
. The master communicating portion
23
A of the communication relay unit
23
controls the network GNW, and the slave communicating portions
23
D
1
-
23
Dk control respectively the networks HNW
1
-HNWk. In the communication relay unit
23
, as shown in
FIG. 9
, the master communicating portion
23
A and the slave communicating portions
23
D
1
-
23
Dk transfer data between them via the dual port memories (DPRAM)
309
.
However, there has been a problem that the master communicating portion
23
A and the slave communicating portions
23
D
1
-
23
Dk cannot read data that has been written by the CPU on the opposite side until their CPUs
301
A,
301
B,
307
A and
307
B have finished writing of all data, and a delay in data transfer occurs.
An object of the present invention is therefore to provide a communication apparatus for elevators which can avoid a delay in data transfer for data that requires high-speed transfer.
DISCLOSURE OF THE INVENTION
According to a first aspect of the present invention, in a communication apparatus for elevators, a network protocol converter connected between at least two elevator communication networks, through which data is communicated with different protocols, includes a dual port memory for ordinary data transfer and a register memory for priority data transfer with interrupts at shorter intervals.
According to a second aspect of the present invention, the above communication apparatus for elevators comprises at least two elevator communication networks through which data is communicated with different protocols, and a network protocol converter connected between those networks, the network protocol converter including a dual port memory for transferring ordinary data, a register memory for transferring priority data with read/write processing at shorter intervals, and a network controller provided in each of the communication networks for selectively choosing one of the dual port memory and the register memory to perform the ordinary data transfer and the priority data transfer.
According to a third aspect of the present invention, the network controller includes a memory storing respective read/write cycles of the dual port memory and the register memory and priority data, means for setting the read/write cycles and the priority data which are stored in the memory, and network data transfer control means for, in accordance with the read/write cycles and the priority data having been set, performing the ordinary data transfer via the dual port memory and the priority data transfer for the set predetermined priority data via the register memory.
According to a fourth aspect of the present invention, the elevator communication network generates a predetermined priority transfer signal prior to data to be subjected to the priority data transfer, and the network controller includes a memory storing respective read/write cycles of the dual port memory and the register memory, means for setting the read/write cycles stored in the memory, and network data transfer control means for, in accordance with the read/write cycles having been set, performing the ordinary data transfer via the dual port memory, and when the priority transfer signal is received, performing the priority data transfer for data of a predetermined length subsequent to the priority transfer signal via the register memory.
According to a fifth aspect of the present invention, the network protocol converter includes, as the register memory for the priority data transfer, a pair of FIFO register memories capable of reading and writing data respectively only in one direction to perform data transfer in opposite directions.
REFERENCES:
patent: 4683989 (1987-08-01), Pillage et al.
patent: 4724520 (1988-02-01), Athanas et al.
patent: 4958707 (1990-09-01), Yoneda et al.
patent: 5854454 (1998-12-01), Upender et al.
patent: 5936211 (1999-08-01), Kim
patent: 6062343 (2000-05-01), Wang
patent: 6349795 (2002-02-01), Tatsumi et al.
patent: 6378662 (2002-04-01), Yamada
patent: 5-110620 (1993-04-01), None
patent: 10-182023 (1998-07-01), None
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