Communication data receiver capable of minimizing the discarding

Multiplex communications – Data flow congestion prevention or control

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Details

370429, 370503, H04L 1254

Patent

active

056639481

ABSTRACT:
A communication data receiver comprises a counter for generating a write address on a buffer memory for communication cell data according to a write signal directing the communication cell data to be written into the buffer memory, a latch circuit for holding a write address for start communication cell data being written, an overflow detection circuit for detecting an overflow of the buffer memory, a circuit for prohibiting communication cell data from being written into the buffer memory according to an overflow detection signal, and a circuit for setting a write address held in the latch circuit as a writing start address for the next received communication cell data in the counter according to the overflow detection signal.

REFERENCES:
patent: 4603416 (1986-07-01), Sequel et al.
patent: 4947388 (1990-08-01), Kuwahara et al.

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