Communication control apparatus between processor systems

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Details

395728, 395476, 395468, 39520042, G06F 1314

Patent

active

056550820

ABSTRACT:
A communication control apparatus includes a pair of communication controllers each having a dual port RAM (DPR) with an interruption request generating function. A master processor system is connected to one port of the DPR in one of the communication controllers. A slave processor system is connected to one port of the DPR in the other communication controller. A channel controller is connected to each of the other port of the DPR in one communication controller and to the other port of the other communication controller, respectively. Both of the channel controllers are coupled by a communication channel. Both of the communication controllers mutually transfer data on the communication channel so that the contents of the DPR in the pair of communication controllers always coincide, so that the master processor system and the slave processor system operate as if they were connected by one DPR.

REFERENCES:
patent: 4718003 (1988-01-01), Andersen et al.
patent: 5057998 (1991-10-01), Hirokawa
patent: 5297260 (1994-03-01), Kametani
patent: 5341473 (1994-08-01), Takayama

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