Communication bus acquisition circuit

Details Communication bus acquisition circuit Communication bus acquisition circuit

1980-02-04

1982-03-16

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 946

Patent

active

043204570

ABSTRACT:
In a digital processing system in which a plurality of control units communicate with each other and with memory over a common bus, an arbitration circuit associated with each of the control units tests for priority among the units requesting access to the bus, granting access to the highest priority unit as soon as the bus is not busy. Priority is determined by priority numbers assigned to each unit. Priority is tested simultaneously in each unit in synchronism, each unit using common lines on the bus for both input and output to establish which unit has highest priority.

REFERENCES:
patent: 3800287 (1974-03-01), Albright
patent: 3886524 (1975-05-01), Appelt
patent: 3996561 (1976-12-01), Kowal et al.
"Standard Specification for S-100 Bus Interface Devices", IEEE Task 696.1/D2, Draft Feb. 1979.

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