Communicating random access memory

Details Communicating random access memory Communicating random access memory

1983-05-20

1986-10-07

Thomas, James D.

Boots, shoes, and leggings

365189, G06F 1516, G11C 700

Patent

active

046163107

ABSTRACT:
A communicating random access shared memory configuration for a multiprocessor system is connected to the processors for transferring data between the processors. The random access memory configuration includes a plurality of interconnected random access memory chips, each of these memory chips including first and second separate memory bit arrays having N word storage locations of M bit length with M bit buffer connected in between the first and second bit arrays on each memory chip, and first and second input/output ports connected to first and second bit arrays on each chip for entering and removing data externally to and from the chip. A controller is located on each chip and connected to the first and second memory arrays and the M bit buffer for transferring data between the first and second memory arrays and into and out of the first and second input/output ports.

REFERENCES:
patent: 4096571 (1978-06-01), Vander Mey
patent: 4212057 (1980-07-01), Devlin et al.
patent: 4257095 (1981-03-01), Nadir
patent: 4280197 (1981-07-01), Schlig
patent: 4541075 (1985-09-01), Dill

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