Common mode voltage generation at a differential output of...

Details Common mode voltage generation at a differential output of... Common mode voltage generation at a differential output of...

2006-01-17

2006-01-17

Pascal, Robert (Department: 2819)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

C330S253000, C326S083000

Reexamination Certificate

active

06987421

ABSTRACT:
A common mode voltage generating circuit has a first and a second output terminal (O1, O2) to supply a common mode voltage (Vcm) to a differential output of an amplifier stage (AMP). A first FET (T1) and a second FET (T2) have interconnected drains, and both have a source coupled to a supply terminal (Vss). A third FET (T3) has a source coupled to the drain of T1, a drain coupled to O1and to a gate of T1. A fourth FET (T4) has a source coupled to a drain of T2, a drain coupled to O2and to a gate of T2. A fifth FET (T5) has a gate for receiving a first reference voltage (VI), and a sixth FET (T6) has a source coupled to the drain of T5, a drain receiving a current (2I) from a current source (CS4), wherein the drain and the gate of T6are interconnected. T3, T4and T6have interconnected gates and are biased to operate in their saturation region. T1, T2and T5are biased to operate in their linear regions. The common mode voltage generating circuit further comprises a seventh FET (T7) with a source coupled to Vss, a drain coupled to the drain of T5, and with a gate which receives a second reference voltage (Vh). T7is biased to operate in its linear region. Bipolar transistors may be used instead of FET's.

REFERENCES:
patent: 6433634 (2002-08-01), Blanken et al.
patent: 2004/0239426 (2004-12-01), Miwa et al.

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