Coded data generation or conversion – Converter calibration or testing
Patent
1990-02-12
1991-01-29
Shoop, Jr., William M.
Coded data generation or conversion
Converter calibration or testing
341172, H03M 110
Patent
active
049890026
ABSTRACT:
There is disclosed a fully differential converter (10) having a very high common mode rejection ratio. The capacitive parasitics (CP) are accounted for by a strategic placement of error correction capacitances (20). The actual value of the capacitance is calculated from time to time by successively making comparative circuit operations and by adding and subtracting capacitance automatically under logic control (62) until the circuit is in near balance. The final value of the added capacitance for any given calculation set is stored in a memory (61). In this manner the circuit become self-calibrating and common mode rejection ratios over 90 db are possible.
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patent: 4896156 (1990-01-01), Garverick
Braden Stanton
Comfort James T.
Hoff Marc S.
Shoop Jr. William M.
Sorensen Douglas A.
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