Common mode detection and dynamic correction input circuit

Details Common mode detection and dynamic correction input circuit Common mode detection and dynamic correction input circuit

2007-04-17

2007-04-17

Wells, Kenneth B. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S073000

Reexamination Certificate

active

10852954

ABSTRACT:
A single ended input circuit can receive an input signal and generate a correction voltage corresponding to a common mode voltage of the input signal. A comparison of the input signal can be adjusted in response to the correction voltage. In one arrangement, an input circuit (100) can include a compare section (102) with first input (104-0) and second input (104-1). The first input (104-0) can receive an input signal (IN). The second input (104-1) can receive a reference voltage generated by a common mode detect and hold (CMDH) section (106). A (CMDH) section (106) can include an integrator circuit (108), an analog-to-digital (A/D) converter circuit (110), a digital hold circuit (112), and a digital-to-analog (D/A) converter (114). A correction voltage generated by integrating the input signal can be applied as the generated reference voltage. In another arrangement, a voltage (CLKP-CLKN) generated by comparing an input signal (CLK) to an applied reference voltage (REF) can be integrated by an integrator (202) to generate a correction voltage. Such a correction can be applied as negative feedback to adjust the comparison between the input signal (CLK) to an applied reference voltage (REF). This correction voltage can also be applied to adjust the comparison of an input data signal to a reference voltage.

REFERENCES:
patent: 4276539 (1981-06-01), Eshraghian et al.
patent: 4345213 (1982-08-01), Schade, Jr.
patent: 4463272 (1984-07-01), Tucker
patent: 4571514 (1986-02-01), Nelson et al.
patent: 4734677 (1988-03-01), Cake et al.
patent: 5475323 (1995-12-01), Harris et al.
patent: 5760844 (1998-06-01), Jorden
patent: 5831457 (1998-11-01), McClure
patent: 5856750 (1999-01-01), Koseki
patent: 5909143 (1999-06-01), Weber
patent: 5945864 (1999-08-01), Weber et al.
patent: 5969547 (1999-10-01), Pernyeszi
patent: 5994927 (1999-11-01), Naito et al.
patent: 6392450 (2002-05-01), Yoshida et al.
patent: 6411165 (2002-06-01), Delano
patent: 6690309 (2004-02-01), James et al.
patent: 6694105 (2004-02-01), Chang et al.
patent: 2003/0039320 (2003-02-01), Christoph et al.
EIA/JEDEC STANDARD No. 8-6: High Speed Transceiver Logic (HSTL) A 1.5 V Output Buffer Supply Voltage Based Interface Standard for Digital Integrated Circuits Aug. 1995.

Affiliated with

Also associated with

Rating

Common mode detection and dynamic correction input circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Common mode detection and dynamic correction input circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Common mode detection and dynamic correction input circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3778902