Boots – shoes – and leggings
Patent
1987-10-27
1988-10-25
Zache, Raulfe B.
Boots, shoes, and leggings
G06F 1516
Patent
active
047808128
ABSTRACT:
A shared memory system for a plurality of computers comprises a memory linked to the computers via a series of ports which are opened in turn by a control means to grant access to the memory--the operation is such that the memory is apparently always available to each computer and no cumbersome handshake or interrupt routines need be involved. Access may be granted to every computer according to a fixed cyclic sequence or, in sequence, only to those computers which request such access. In the latter case particularly, it may be advantageous to assign a graded priority to the computers and to grant the access to the shared memory in priority order.
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patent: 4354227 (1982-10-01), Hays et al.
patent: 4365292 (1982-12-01), Barnes et al.
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IBM Technical Disclosure Bulletin, vol. 19, No. 7, Dec. 1976, pp. 2725-2726, New York, U.S.; H. Buerge, et al.: "Dynamic slot allocation in date transmission system" (Entire document).
Electronics Letters, vol. 17, No. 24, Nov. 1981, pp. 924-925, London, GB, A. Gago, et al.: Low-Cost Multiprocessor System", FIGS. 1-3, pp. 924-925, left column, line 17.
Freestone William E.
Leak David M.
British Aerospace Public Limited Company
Zache Raulfe B.
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