Boots – shoes – and leggings
Patent
1992-12-18
1995-08-15
Kim, Ken S.
Boots, shoes, and leggings
3642712, 3642713, 364269, 364DIG1, 364578, 395550, G06F 1516
Patent
active
054427720
ABSTRACT:
A logic simulator is distributed over a plurality of processing nodes for simulating a circuit. A plurality of logic simulation programs execute on respective ones of the nodes, and simulate respective parts of the circuit. Each of the logic simulation programs executes at its own pace, and either receives an input from or supplies an output to another of the nodes. Each of the logic simulation programs also predicts an input when unavailable from another of the nodes. A host broadcasts a breakpoint time to all of the nodes. A plurality of logic simulation controllers execute on respective ones of the nodes, and direct storage of nets and/or states of the logic simulation programs. Each of the logic simulation controllers receives the breakpoint time from the host and reports to the host when the respective logic simulation program has advanced to or past the breakpoint time. When all of the nodes have reported that their respective logic simulation programs have advanced to or past the breakpoint time, this means that nets and states at the breakpoint time are valid. Then, the host obtains from one or more of the nodes values of one or more nets and/or states at the breakpoint time. In another mode of operation, before broadcasting the breakpoint time, the host sends to one of the nodes responsible for generating a condition or event a request to notify the host when the condition or event occurs and a local virtual time that the condition or event occurred. The host then broadcasts the local virtual time as the breakpoint time.
REFERENCES:
patent: 4306286 (1981-12-01), Cocke et al.
patent: 4656580 (1987-04-01), Hitchcock et al.
patent: 4725971 (1988-02-01), Doshi et al.
patent: 4751639 (1988-06-01), Corcoran et al.
patent: 4819234 (1989-04-01), Huber
patent: 4914612 (1990-04-01), Beece et al.
patent: 4929940 (1990-05-01), Franaszek et al.
patent: 4941087 (1990-07-01), Kap
patent: 4985860 (1991-01-01), Vlach
patent: 5006978 (1991-04-01), Neches
patent: 5021947 (1991-06-01), Campbell et al.
patent: 5041996 (1991-08-01), Nakai et al.
patent: 5072364 (1991-12-01), Jardine et al.
patent: 5097412 (1992-03-01), Orimo et al.
patent: 5111413 (1992-05-01), Lazansky et al.
patent: 5115502 (1992-05-01), Tallman
patent: 5129077 (1992-07-01), Hillis
patent: 5222229 (1993-06-01), Fukuda et al.
patent: 5239641 (1993-08-01), Horst
patent: 5250943 (1993-10-01), Childs et al.
patent: 5293627 (1994-03-01), Kato et al.
patent: 5295257 (1994-03-01), Berkovich et al.
patent: 5301309 (1994-04-01), Sugano
patent: 5307483 (1994-04-01), Knipfer et al.
IBM TDB vol. 33, No. 3A, Aug. 1990, "Parallel Event-Driven Simulation" pp. 336-339.
ACM Transactions on Programming Languages & Systems, vol. 7, No. 3, Jul. 1985, D. R. Jefferson, U. of Southern California, pp. 404-425, "Virtual Time".
1990 International Conference on Parallel Processing, Y. Liu et al., Dept. of Computer Science & Eng., U. of Wash., Seattle, Wash., pp. 201-209, "Determining the Global Virtual Time in a Distributed Simulation".
Childs Philip L.
Radia Nimish S.
Skovira Joseph F.
International Business Machines - Corporation
Kim Ken S.
Samodovitz Arthur J.
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