Command decoder of semiconductor memory device

Details Command decoder of semiconductor memory device Command decoder of semiconductor memory device

2006-06-13

2006-06-13

Elms, Richard (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S230080, C365S185190

Reexamination Certificate

active

07061826

ABSTRACT:
A command decoder is provided for controlling internal circuits of a semiconductor chip to operate in synchronism with a first internal clock signal having a pulse width, which is twice as wide as that of an external clock signal, and a second internal clock signal having an opposite phase to the first internal clock signal. An internal operation controller controls internal circuits of a semiconductor chip to operate in synchronism with a first internal clock signal having a pulse width, which is N times as wide as that of an external clock signal, if the command signal is received at a first rising edge of the external clock signal, and controls the internal circuits of the semiconductor chip to operate in synchronism with a second internal clock signal having an opposite phase to the first internal clock signal, if the command signal is received at a second rising edge of the external clock signal.

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