Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-12-29
2008-09-02
Phung, Anh (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S230060
Reexamination Certificate
active
07420872
ABSTRACT:
A command decoder circuit generates command signals for performing internal operations and according to external command signals, according to values of the write latency values and whether write latency is an even numbered or odd-numbered value.
REFERENCES:
patent: 5673233 (1997-09-01), Wright et al.
patent: 6483769 (2002-11-01), La
patent: 6714438 (2004-03-01), Kawabata
patent: 6757214 (2004-06-01), Kawaguchi et al.
patent: 7027337 (2006-04-01), Johnson et al.
patent: 2005/0141333 (2005-06-01), Fujisawa
patent: 19990014268 (1999-02-01), None
patent: 1020060054575 (2006-05-01), None
Park Jung Hoon
Yang Sun Suk
Hynix / Semiconductor Inc.
Ladas & Parry LLP
Phung Anh
LandOfFree
Command decoder circuit of semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Command decoder circuit of semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Command decoder circuit of semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3988190