Combining circuitry

Details Combining circuitry Combining circuitry

2006-04-07

2010-11-23

Mai, Tan V (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07840628

ABSTRACT:
A combining circuit and method combines a plurality of terms in a multiplier circuit. The combining circuit includes a first circuit, arranged to receive a first set of the plurality of terms and to combine the first set of terms to produce a first combined term set. The combining circuit also includes a second circuit, arranged to receive a second set of the plurality of terms and to combine the second set of terms to produce a second combined term set. The combining circuit further includes a third circuit, arranged to receive the first and second combined term sets and to combine the first and second combined term sets to produce a third combined term set. The combining circuit outputs the first combined term set as a first combination result and the third combined term set as a second combination result.

REFERENCES:
patent: 5253195 (1993-10-01), Broker et al.
patent: 6286024 (2001-09-01), Yano et al.
patent: 6598064 (2003-07-01), Green
Taylor, G. et al.: “A 100 MHz Floating Point/Integer Processor”, Proceedings of the Custom Integrated Circuits Conference, Boston, May 13-16, 1990, New York, IEEE, US, vol. Conf.. 12, May 13, 1990, pp. 2451-2454, XP000167744.

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