Combined system, method and apparatus for wire bonding and...

Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing

Reexamination Certificate

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C219S056100, C228S001100

Reexamination Certificate

active

06564115

ABSTRACT:

FIELD OF THE INVENTION
The present invention is related in general to the field of electronic systems and semiconductor devices and more specifically to combined automated systems, methods and apparatus for wire bonding to semiconductor chips and quality testing.
DESCRIPTION OF THE RELATED ART
The inputs/output pads of integrated circuit chips are conventionally connected to the outside world by metal wires forming a span. The metal of the input/output pads typically consists of aluminum or copper, and as wire materials gold or copper are typically used. In most semiconductor devices, a capillary is used to attach the one end of the connecting wire (for instance, gold) to the pad metal in form of a flattened ball. Elevated temperature, ultrasonic energy, mechanical pressure and bonding time need to be carefully controlled to create a high-quality weld; in the example of gold ball onto aluminum metal, this weld consists of a consecutive series of five gold-aluminum intermetallics, which need to be rapidly initiated in the short period of bonding time (between 5 and 20 ms).
The other end of the connecting wire is attached to a metal surface by the capillary in form of a stitch bond. In many semiconductor devices, the metal surface consists of a silver flash deposited onto a copper-base leadframe, and the wire stitch is formed at elevated temperatures and mechanical pressure (range about 5 to 20 ms) so that intermetallic diffusion can take place. Similar metal interdiffusion creates the bond when a wedge-shaped tool is used instead of a capillary to form wedge bonds.
The operation of wire bonding is performed by automated, computer-controlled bonders, commonly combined with vision systems. They allow setting and controlling of bonding parameters such as geometrical positioning, impact velocity and contact force of bonding tool and dwell time and ultrasonic energy during bond formation. In spite of these controls, the quality of the bonds is sometimes marginal or outright poor. In most instances, the root cause is an unnoticed variation of the metal-to-be-bonded (for instance, crystallinity or hardness) or an insufficiently clean metal surface (for example, undetected oxidation, organic residue, or particulate contamination) Quality tests have, therefore, been developed during the last decade which aim at identifying poor bond quality or run-away processes as early as possible.
The most important and routinely performed tests are the pulling of the wire spans to the wire break point, and the shearing of the wire attachments, especially ball bonds, to the shear-off point. In both of these tests, the required forces are measured; the tests are destructive and have to be performed off-line, but are relatively fast. Other tests are much more cumbersome and time consuming; these tests include chemical etching of metal surfaces or metallurgical cross sections, surface Auger analysis, or Knoop metal hardness analysis. Of course, all of these tests are destructive and off-line.
SUMMARY OF THE INVENTION
According to the present invention for semiconductor integrated circuit (IC) assembly, the two operations of wire bonding and wire quality testing are combined into one computer-controlled system, in which one tool head performs first the bonding operation and then on-line the testing operation, and finally implements any corrections based on the test results in real-time feedback into the bonding parameters, before continuing with the bonding processes. Based on the invention, the number of faulty bonds is reduced to near zero, and the bonding production downtime due to off-line testing is substantially eliminated.
The present invention is related to high density ICs, especially those having high numbers of inputs/outputs, or bonding pads, further to devices using metallic leadframes as well as to chips being mounted on insulating substrates, and also to devices requiring small package outlines and low profiles. These ICs can be found in many semiconductor device families such as processors, digital and analog devices, standard linear and logic products, memories, high frequency and high power devices, and both large and small area chip categories. The invention helps to insure built-in quality and reliability in applications such as cellular communications, pagers, hard disk drives, laptop computers and medical instrumentation.
The invention utilizes the materials and basic process steps commonly practiced in wire bonding technology, both for ball bonding and wedge bonding variations. However, the bonding process is modified such that test data can be taken after completing only few yet statistically meaningful numbers of bonds. The test data is evaluated real-time, automatically converted to potential corrections of the bonding parameters, and fed back to the bonder. In this fashion, improved characteristics of all subsequent bonds are automatically implemented.
It is an aspect of the present invention to provide a technology for combining the wire bonding and the wire testing operations in semiconductor assembly which is fully automatic and does not require additional equipment space for the bonder machines. The aspect is achieved by adding a computer-controlled tool in proximity to the bond head which is designed to perform the wire pulling and bond pushing quality tests and to record the required forces.
Another aspect of the invention is to reach these goals while keeping the cost of equipment change to a minimum and using the installed fabrication equipment base so that no new capital investment is needed.
Another aspect of the present invention is to provide real-time feedback of the testing results so that the bonding parameters can be corrected for improving the bond quality without significant bonder downtime. The aspect is achieved by converting the test data automatically into bonding parameters, with direct feedback to the bonder.
Another aspect of the present invention is to provide flexibility to the bonding process in order to accept variations in the chip metallization such as variable crystallinity, oxide formation, and at least some accidental impurities.
Another aspect of the present invention is to introduce assembly concepts which are flexible so that they can be applied to ball bonding as well as to wedge bonding technologies, and to many families of semiconductor IC products, and are further general so that they can be applied to several future generations of products.
These aspects have been achieved by the teachings of the invention concerning system and apparatus design concepts and methods suitable for mass production. Various modifications have been successfully employed to satisfy different selections of product geometries and materials.
The wire testing tool is designed as an elongated arm having features at its first end portion suitable for wire pulling and bond pushing. This tool for wire testing can be retracted during the wire bonding processes.
In one embodiment of the invention, this retraction is accomplished by rotating the arm around an axis through its second end portion. The axis is fastened to a support structure attached to the tool head operating the bonding tool.
In another embodiment of the invention, the retraction is accomplished by rotating the arm together with the support structure, which in this case has a rotation axis in proximity to the tool head.
The technical advances represented by the invention, as well as the aspects thereof, will become apparent from the following description of the preferred embodiments of the invention, when considered in conjunction with the accompanying drawings and the novel features set forth in the appended claims.


REFERENCES:
patent: 4571688 (1986-02-01), Kashihara et al.
patent: 4976392 (1990-12-01), Smith et al.
patent: 5894981 (1999-04-01), Kelly
patent: 6078387 (2000-06-01), Sykes

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