Combined power routing and light shielding in an LCD array

Liquid crystal cells – elements and systems – Particular structure – Having significant detail of cell structure only

Reexamination Certificate

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Details

C349S043000, C349S073000, C349S139000, C349S143000

Reexamination Certificate

active

06771337

ABSTRACT:

TECHNICAL FIELD
The present invention relates to the field of integrated circuit manufacture, and more specifically to an improved method and construction for the manufacture of light reflective liquid crystal display (“LCD”) arrays. The predominant current usage of the present inventive combined power routing and light shielding is in the construction of light reflective LCD arrays for projection display devices, wherein it is desirable to provide high capacitance and low resistance power routing and further where it is desirable to provide light shielding to prevent light from reaching silicon circuit layers.
BACKGROUND ART
When light reaches semiconductor junctions of an LCD array a current is produced by a photoelectric effect, which will interfere with the desired operation of the array. Ideally, the mirrors of a reflective array will be positioned to fill as much of the surface area as possible, as this will result in the brightest and clearest image. Further, the mirrors block light from reaching the semiconductor junctions and so, the greater quantity of the total surface is composed of mirror surface, the less problem there is with light reaching the semiconductor junctions. However, no matter what the arrangement of the mirrors might be, there we still be some space there between where light will potentially reach the semiconductor junctions and will, thus, cause the unwanted current discussed above.
It is known in the art to provide light shielding in the construction of light reflective LCD arrays. Primarily, this has been in the form of an extra layer to shield the light. Of course, this adds extra expense to the manufacturing process, but the solution has been thought to be worth such expense in the prior art. Another known method has been to use “dummy” (non-functioning) traces on an existing layer to block the light. This does accomplish the light blocking function. However, an obvious disadvantage to this method is that the dummy traces take up much needed real estate of the chip layout.
It would be beneficial to have a method or means for shielding light which might pass between the mirrors in a light reflective LCD array which does not involve extra complexity and/or expense in the construction of the array. It would be an additional benefit if such solution also provided additional advantages not contemplated in the prior art. However, to the inventor's knowledge, no such solution to this problem has existed prior to the present invention.
SUMMARY
Accordingly, it is an object of the present invention to provide an apparatus and method for shielding light which might pass between the mirrors in a reflective LCD array.
It is another object of the present invention to provide an apparatus and method for shielding light away from semiconductor junctions in a reflective LCD array.
It is still another object of the present invention to provide an apparatus and method for shielding light in a reflective LCD array which does not require layers or materials in addition to those used to accomplish other functions in the array.
It is yet another object of the present invention to provide a method and apparatus for routing power busses in a reflective LCD array such that light is shielded from reaching semiconductor junctions.
It is still another object of the present invention to provide an apparatus and method for routing power in an LCD array which is very low in resistance.
It is yet another object of the present invention to provide an apparatus and method for routing power in an LCD array having high capacitance between lines.
Briefly, a known embodiment of the present invention is a reflective LCD array having metal layers with power distribution patterns aligned such that they completely fill gaps between the mirrors of the array. A first metal layer will have power distribution lines arrayed along generally vertical paths and positioned between vertical gaps in the mirrors. A second metal layer will have power distribution lines arrayed along generally horizontal paths and positioned between horizontal gaps in the mirrors. The inventive arrangement allows for very wide power distribution traces without wasting valuable layout space. Such wide parallel traces provide the additional advantage of having very low resistance and high capacitance there between.
These and other objects and advantages of the present invention will become clear to those skilled in the art in view of the description of modes of carrying out the invention, and the industrial applicability thereof, as described herein and as illustrated in the several figures of the drawing. The objects and advantages listed are not an exhaustive list of all possible advantages of the invention. Moreover, it will be possible to practice the invention even where one or more of the intended objects and/or advantages might be absent or not required in the application.
Further, those skilled in the art will recognize that various embodiments of the present invention may achieve one or more, but not necessarily all, of the above described objects and advantages. Accordingly, the listed advantages are not essential elements of the present invention, and should not be construed as limitations.


REFERENCES:
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patent: 5331447 (1994-07-01), Someya et al.
patent: 5767936 (1998-06-01), Sugimura
patent: 5808719 (1998-09-01), Fujiwara et al.
patent: 5953088 (1999-09-01), Hanazawa et al.
patent: 6025952 (2000-02-01), Stephenson
patent: 6081305 (2000-06-01), Sato et al.
patent: 6392734 (2002-05-01), Gregory
patent: 6476563 (2002-11-01), Silvestre

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