Combined ohmic and Schottky output transistors for logic circuit

Details Combined ohmic and Schottky output transistors for logic circuit Combined ohmic and Schottky output transistors for logic circuit

1977-05-25

1979-05-22

Larkins, William D.

357 44, 357 46, 357 86, 357 92, H01L 2704, H01L 2956

Patent

active

041562461

ABSTRACT:
A silicon semiconductor integrated logic circuit of the injection or merged transistor logic type has output contacts in which ohmic and Schottky barrier portions are combined. A portion of the surface region of each output transistor collector is converted to more heavily doped N-type conductivity so that a metal contact applied thereto makes low resistance contact to the more heavily doped portions but forms a contact of the Schottky barrier type to the more lightly doped portion. The effect of the Schottky contact portion is to control minority carrier storage in the collector of the NPN output transistor by forcing the hole excess density at the Schottky portion surface to be zero thereby enabling short propagation delay time.

REFERENCES:
patent: 3938243 (1976-02-01), Rosvold
patent: 4075039 (1978-02-01), Sloan
Hewlett, "Schottky I.sup.2 L", IEEE J. of Solid State Circuits, vol. SC10, No. 5, Oct. 1975, pp. 343-348.

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