Communications: electrical – Digital comparator systems
Patent
1975-11-06
1977-01-04
Yusko, Donald J.
Communications: electrical
Digital comparator systems
179 84VF, 331 11, 331 60, 331156, 340311, 325 22, H04Q 908, H03B 304, H03B 530, H04M 1102
Patent
active
040017826
ABSTRACT:
A combined encoder and decoder circuit which uses a single frequency selective resonant reed in a closed loop oscillator configuraion permitting simultaneous encoder and decoder operation. A closed loop oscillator has a resonant reed connected in series between an input and output terminal and produces a signal at the resonant frequency of the reed. Positive signal feedback from the output to input terminal is provided by an amplifier, operated between saturation and cut-off, and a controllable attenuator. A level detector and the attenuator effectively form a limited range negative feedback loop which effectively maintains the signal magnitude at the output terminal at a substantially constant level. A decode detector monitors the signal level at the output terminal and produces a decode signal when an input signal, having the same frequency as the resonant frequency of the reed, has a magnitude which is so large that the negative feedback circuitry cannot maintain a constant signal level at the oscillator output terminal. The output of the positive feedback amplifier always provides a constant amplitude output signal which can be used for encoding purposes. Because of the use of both positive and negative feedback, the circuit as a fast decoding response to large input signals while preventing responses to small amplitude input signals.
REFERENCES:
patent: 3584302 (1971-06-01), Lundgren
patent: 3879709 (1975-04-01), Yukawa
patent: 3952261 (1976-04-01), Hara et al.
Gillman James W.
Melamed Phillip H.
Motorola Inc.
Southard Donald B.
Yusko Donald J.
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