Measuring and testing – Coating material: ink adhesive and/or plastic
Reexamination Certificate
2002-01-31
2004-06-22
Raevis, Robert (Department: 2856)
Measuring and testing
Coating material: ink adhesive and/or plastic
C073S866400
Reexamination Certificate
active
06752012
ABSTRACT:
FIELD OF THE INVENTION
The present invention is generally related to the field of semiconductor material testing and analysis, and more particularly to the field of surface characterization and assessing the surface properties of a semiconductor material including thin films for a semiconductor die under test.
BACKGROUND OF THE INVENTION
An integrated circuit typically includes a packaged semiconductor die including electrical circuitry formed upon a wafer substrate. Bond pads are typically employed to provide an electrical/mechanical interface between pin packaging and the signal lines defined in the die. These bond pads are a crucial portion of the overall integrated circuit package in that they need to provide a reliable electrical interface to the die for multi-point testing prior to final assembly. Hence, the reliability and testability of these bond pads are an important component of the semiconductor process.
The bond pad surface composition can be effected by wafer fab processing steps that include deposition and etch of metals, oxides, barrier and protective overcoat (PO). It is known that changes in any of the wafer fab processing steps can adversely affect the contact resistance stability of the bond pad during a multi-probe testing of a die under test (DUT). During multi-probe testing, a test current flowing between a probe needle and the bond pad, such as aluminum pad, is constricted to the intermetallic contact areas, commonly known as a-Spots, and across any thin conductive or semi-conductive films. The contact resistance (CRES) across the interface is comprised of the constriction resistance plus the interfacial film resistance. The CRES magnitude and stability are entirely attributable to the interfacial phenomena that occur between the probe contact area and the bond pad surface composition. High and unstable contact resistance during multi-probe disadvantagely results in yield fallout and false device failure identification.
Understanding of the bond pad surface composition is critical to ensure process optimization that will enable a surface with good properties for high multi-probe yield, and once optimized, implement process control monitoring at the bond surface.
Elemental surface analysis of the bond pad is a typical strategy employed for identifying types of molecules present on the bond pad surface. Industry-wide, characterization is typically performed using various surface analysis techniques that include auger electron spectrometry, time of flight secondary ion mass spectrometry (ToF-SIMS), x-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM) and Fourier transform infrared spectroscopy (FTIR). Transmission electron microscopy (TEM) and Scanning electron microscopy (SEM) are also used.
For many of these techniques, the results can be compromised by an analyst's bias regarding the region chosen for analysis, and the analysis “spot size” is to small to lend insight into the “global” surface properties. For instance, a 30 Angstrom sampling spot on one bond pad may not be representative of the entire bond pad, or of all bond pads on a die, etc. Investigative work shows as a result of the small sampling area and site-specific nature of most of these techniques that it is difficult to show a correlation between a specific compositional property and contact resistance behavior at multi-probe.
There is desired a technique suitable for process control (in-line or at-line) that can provide clear and rapid feedback at relatively low cost, and that can determine and predict whether a bond pad surface composition is suitable for accurate multi-probe testing when the associated semiconductor die is later subjected to testing, such as during product validation.
SUMMARY OF THE INVENTION
The present invention achieves technical advantages by using a nanoindenter type device to determine localized mechanical properties of a substrate (such as a bond pad) as a function of displacement depth or applied load of the nanoindenter tip into the substrate surface, and accurately predicting the electrical property stability of the substrate under test as a function of this data. In a further embodiment, the nanoindenter type instrument is modified to further include a localized electrical measurement capability whereby the measured electrical property is correlated to the mechanical property measurement and displacement depth or applied load to understand substrate or thin film surface composition and its subsequent suitability for multi-probe testing.
The present invention includes a method and apparatus that determines a substrate or thin film surface mechanical property as a function of displacement depth or applied load of the nanoindenter tip into the substrate under test. In one embodiment, it is expected that measured mechanical properties (such as material hardness) will decrease as a function of displacement depth or applied load onto the sample. Advantageously, this data is utilized to accurately predict the electrical property stability of the conductive substrate or bond pad to determine its suitability for multi-probe at a later process step. This data processing of the present invention provides for predicting the presence of an unwanted layer material on the substrate surface, such as due to a change in a wafer fab processing, which this layer will lead to subsequent multi-probe testing problems. Using nanoindentation has the advantageous features of being low cost compared to other techniques, is capable of sampling a large surface area, is less time intensive, and is significantly easier to interpret by a “non-expert”. As such, nanoindentation has these many qualities that make it suitable for monitoring fab process changes that may impact electrical properties and which may adversely effect subsequent multi-probe testing of the die under test. An additional simultaneous measurement of electrical properties while obtaining mechanical properties as a function of nanoindenter tip displacement depth and applied load into the surface further provides for the prediction that the substrate electrical property stability.
REFERENCES:
patent: 5309754 (1994-05-01), Ernst
Randall, et al., “Characterization of integrated circuit aluminium bonding pads by nonoindentation and scanning force microscopy,”Surface and Coatings Technology, vol. 99, pp. 111-117, 1998.
Broz Jerry J.
Hartfield Cheryl D.
Rincon Reynaldo M.
Brady III W. James
Raevis Robert
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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