Combined ECL-to-TTL translator and decoder

Details Combined ECL-to-TTL translator and decoder Combined ECL-to-TTL translator and decoder

1990-03-20

1991-05-21

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307449, 307451, 307455, H03K 1992

Patent

active

050178121

ABSTRACT:
A combined ECL-to-TTL translator and decoder circuit consumes less power and has improved speed over prior art translator-decoder circuits. Low power consumption occurs since current does not flow appreciably through the combined translator-decoder circuit when its corresponding decoded output line is not selected. The combined circuit is faster than prior art translator-decoders due to reduced circuitry. The circuit includes a pair of transistors connected in series, a pair of transistors connected in parallel, and a pair of transistors connected as a current mirror.

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patent: 4958094 (1990-09-01), Ishii et al.
patent: 4968905 (1990-11-01), Sanwo et al.

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