Combined deemphasis circuit and noise blanker

Details Combined deemphasis circuit and noise blanker Combined deemphasis circuit and noise blanker

1989-01-13

1990-12-04

Isen, Forester W.

Electrical audio signal processing systems and devices

Binaural and stereophonic

Broadcast or multiplex stereo

H04H 500

Patent

active

049759531

ABSTRACT:
An FM stereo radio circuit has an ultrasonic noise detector and an amplitude noise detector each for detecting impulse noise by developing an average noise signal and comparing the average noise signal with an attenuated value of the instantaneous noise signal to generate a noise flag. A dual mode circuit normally operates as a low pass filter for a deemphasis function and is switched by the noise flag to operate as a sample and hold circuit which blanks the noise pulse. The dual mode circuit uses a switched capacitance design and is driven by clock signals to serve as a filter. The clock signals are stopped by the noise flag to effect the sample and hold function.

REFERENCES:
patent: 4087756 (1978-05-01), Rogers, Jr.
patent: 4574390 (1986-03-01), Hirohashi et al.
patent: 4680793 (1987-07-01), Sugai et al.

Affiliated with

Also associated with

Rating

Combined deemphasis circuit and noise blanker does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Combined deemphasis circuit and noise blanker, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Combined deemphasis circuit and noise blanker will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-888683