Combinational logic for comparing N-bit wide buses

Details Combinational logic for comparing N-bit wide buses Combinational logic for comparing N-bit wide buses

1998-09-10

2000-09-05

Wambach, Margaret R.

Communications: electrical

Digital comparator systems

G06F 702

Patent

active

061149462

ABSTRACT:
A combinational logic circuit for determining whether an address is inside or outside a range at least partially defined by a control address bit. The logic circuit includes combinational logic connected to an address bit line for receiving the address bit being tested and connected to a control address bit line for receiving the control address bit at least partially defining the range. The combinational logic is configured to produce a signal indicating whether the address bit being tested and the control address bit at least partially defining the range are equal. The combinational logic is also configured to produce a signal representing a mathematical relation between the address bit being tested and the control address bit at least partially defining the range. The mathematical relation identifies whether the address bit being tested is inside or outside the range at least partially defined by the control address bit.

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