Combinational logic feedback circuit to ensure correct power-on-

Details Combinational logic feedback circuit to ensure correct power-on- Combinational logic feedback circuit to ensure correct power-on-

1997-12-12

1999-08-17

Nelms, David

Static information storage and retrieval

Addressing

Byte or page addressing

G11C 800

Patent

active

059403454

ABSTRACT:
A combinational logic feedback circuit ensures correct power-on-reset of a 4-bit synchronous shift register used to generate a plurality of page select signals. The combinational circuit monitors the plurality of page select signals and asserts an invalidity signal when an invalid state is detected. A deglitch circuit inhibits or suppresses glitches which may be output from the combinational circuit due to state transitions of one or more of the page select signals. The deglitch circuit generates in response thereto a reset signal which is applied to the synchronous shift register to reset the shift register to output a valid state.

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