Combination photonic time and wavelength division multiplexer

Optical: systems and elements – Deflection using a moving element – Using a periodically moving element

Reexamination Certificate

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C359S199200, C359S199200, C359S199200

Reexamination Certificate

active

06256124

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates to time and wavelength division multiplexing of binary and non-binary digital information for photonic transmission and information storage systems.
2. Background Art
U.S. Pat. No. 5,623,366, Hait, describes a photonic method of parallel to serial conversion in col. 9 line 54 to col. 10 line 12 and col. 54 lines 1-13 and FIGS. 24 and 24A. What Hait does not teach is the means and method of providing the proper pulse timing needed in his FIG. 24A when the parallel information input provides pulses that arrive in parallel substantially at the same time.
Hait also does not teach how to use a single pulsed laser system (or other single pulsed photonic input system) to provide all the required sequential output pulses, including synchronization pulses, needed to provide a complete serial transmission system.
Nor does Hait teach how to interface electronic with photonic components in order to provide serial photonic transmission capable of operating at a rate faster than the rate at which electronic components provide parallel digital data input.
In the early days of electronic integrated circuit technology, attempts were made at “pulse racing,” that is, timing the delay of signals traveling through a computer chip so that a number of signals arrive at a specific location having a specific timing relationship determined by the various delays applied to each signal. It was found that the many electronic variables involved, such as capacitance and inductance, made pulse racing impractical and unreliable as chip frequencies increased.
Electromagnetic energy, on the other hand, does not suffer from the level of capacitance and inductance complexities found in computer chips. The amount of delay that occurs along a photonic delay path can be determined quite accurately even into the subpicosecond range.
The present invention takes advantage of these characteristics of electromagnetic energy and the materials used with it to provide a complete time division multiplexing system that Hait does not.
SUMMARY OF THE INVENTION
The present invention, a delayed pulse photonic time division multiplexer, is a means and method of providing parallel digital data to serial data conversion having a photonic serial digital output that can be used with both binary and non-binary transmissions. A series of pulses of photonic energy are input to provide an electromagnetic energy and pulse timing source, which is divided into portions. A portion of the energy of these pulses is directed into the output to provide sync (synchronization) pulses which a photonic receiver uses to time the recovery of serial information and convert it into parallel information. “In serial” as used herein refers to data in serial format; i.e., in series.
A portion of the energy of the input pulses is also directed into n optical modulators, the integer “n” being the number of data digits that are to be transmitted in serial within a single data set between sync pulses. For example, if n=8 and the digits are binary, then a byte of serial information would be sent. If n=32, then a 32-bit word is sent. The actual number of digits sent is a matter of engineering choice. The engineer may take into account the need for signal amplification within the receiver and/or the transmitter. He may also need to take into account the accumulation of delay error that can occur using certain types of delay means.
The n optical modulators are first set to their data modulation states, then allowed to complete their setup times, and finally held in those states while each one has a photonic pulse directed to it. In the case of binary amplitude modulation, the pulses either are transmitted through each modulator or are inhibited. However, the present invention is not limited to binary transmission only, but can utilize multistate semaphore digits that use more than two modulation states during each digit time. Thus, the word “digital” in this disclosure can refer to either a binary semaphore or one having more than two modulation states.
Associated with the group of n optical modulators is a group of n serial timing delay means. Each modulator has one of these delay means in series with it so that the photonic pulse reads the condition of the modulator and is delayed sufficiently and directed into the common output so that the resulting modulated digit arrives at the output at its assigned digit time. All the n modulated and delayed pulses therefore arrive at the output in serial following a sync pulse and prior to the next sync pulse. This produces a complete data set having n digit positions filled with the n delayed digital pulses.
Each serial timing delay means may be placed either before or after its modulator; however, the timing provided by all the delay means throughout the present invention must be adjusted so as to time the serial digits properly.
Optical modulators have a setup time; that is, it takes a certain amount of time for the modulators to stabilize in response to their controlling electronic inputs. After this setup time has elapsed, the modulators remain stable during the next photonic pulse, which reads the information loaded into the modulators by the electronic inputs.
Parallel information is provided through n digital information inputs. Each modulator has associated with it one of n modulator loading means which loads digital information from one of the n digital information inputs into its modulator. When triggered, the n modulator loading means load the n optical modulators with modulation states from the n digital information inputs. To initiate modulator loading and begin the setup time for the next data set, the input pulses are directed into the group of n modulator loading means.
The present invention is very versatile in that it can be engineered to match a variety of optical modulators, parallel inputs, optical transmission lines, and demultiplexers. One reason the present invention is superior is that modulators that require a long setup time can be loaded for the next data set while the previous data set is being transmitted, so that time is used efficiently. As a result, the present invention can be engineered to accommodate slow modulators by increasing the number of digit times and the number of parallel information inputs (that is, by increasing n) without wasting valuable transmission time and effective bandwidth.
When photonic parallel inputs are provided along with photonic modulators and loading means, the setup times may be quite short. However, the present invention also has the advantage of being able to interface very slow electronics with the high-speed photonics. In that case, the modulator loading means can be electronic circuits that control optoelectronic modulators triggered by the photonic pulses using a photo diode. Thus, the complete means for triggering and loading the modulators may involve the use of prior art optoelectronic, electronic and/or photonic circuitry.
The loading circuits load information from the digital information inputs into the modulators and hold that information there until the following trigger pulse has occurred. The following trigger pulse occurs after the setup time and the photonic read pulse for that data set.
The pulses which trigger modulator loading may require a delay means to prevent a state change within the modulators during the time that photonic pulses are traveling through the modulators. This depends upon the engineer's choice of circuitry. This loading delay means can be placed between the input pulse source and the modulators. Individual loading delay means can be inserted as needed to produce proper output timing before any or all of the n optical modulators.
A sync timing delay means may also be inserted between the input pulse source and the output so that sync pulses will be properly timed in the output. All of these various delay means can be engineered or made adjustable in order to accommodate a great variety of hardware components and transmission pr

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