Combination parallel/serial execution of sequential algorithm fo

Details Combination parallel/serial execution of sequential algorithm fo Combination parallel/serial execution of sequential algorithm fo

1993-07-08

1995-01-24

Hoff, Marc S.

Coded data generation or conversion

Digital code to digital code converters

Adaptive coding

341106, H03M 730

Patent

active

053845676

ABSTRACT:
An apparatus and method for executing a sequential data compression algorithm that is especially suitable for use where data compression is required in a device (as distinguished from host) controller. A history buffer compresses an array of i identical horizontal slice units. Each slice unit stores j symbols to define j separate blocks in which the symbols in each slice unit are separated by exactly i symbols. Symbols in a string of i incoming symbols are compared by i comparators in parallel with symbols previously stored in the slice units to identify matching sequences of symbols. A control unit controls execution of the sequential algorithm to condition the comparators to scan symbols in parallel but in each of the blocks sequentially and cause matching sequences and nonmatching sequences of symbols to be stored in the array. The parameters i and j are selected to limit the number of comparators required to achieve a desired degree of efficiency in executing the algorithm based upon a trade-off of algorithm execution speed versus hardware cost. A priority encoder calculates from signals output by the slice units each j,i address in which a matching sequence is identified, but it outputs the address of only one (such as the smallest) of these addresses.

REFERENCES:
patent: 4739308 (1988-04-01), Lienard
patent: 4937574 (1990-06-01), Wright
patent: 5179378 (1993-01-01), Ranganathan et al.
Jacob Ziv and Abraham Lempel, "A Universal Algorithm for Sequential Data Compression," IEEE Transactions on Information Theory, vol. IT-23, No. 3, May 1977, pp. 337-343.

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