Combination of analog to digital converter and error correction

Communications: electrical – Audible indication – Percussion-type sound producer

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340347CC, 340347M, H03K 1302

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active

044518218

ABSTRACT:
Error correction circuitry for an analog to digital converter is disclosed which provides for the correction of charge in a charge redistribution converter architecture. This conversion technique as implemented requires that a binary weighted capacitor array be present where the capacitors are accurately binarily weighted in decreasing value. The charge correction circuitry allows for the correction of any deviations of binary weighted capacitance value by adding or subtracting charge from the capacitor array. This is accomplished by the use of a resistor array connected to a capacitor that is equal in capacitance to the smallest capacitor in the capacitor array. The converter includes a microcomputer which determines the charge error for each of the individual capacitors together with the total charge error for the capacitive array coupling with the comparitor. During digitation of the analog input the microcomputer provides correction for each stage of the digitation operation in order to more accurately digitize the analog input.

REFERENCES:
patent: 4195282 (1980-03-01), Cameron
Caves et al., A PCM Voice Codec with On-Chip Filters, IEEE Journal of Solid-State Circuits, vol. SC-14, No. 1, 2/1979, pp. 65-73.
Boyacigiller et al., An Error-Correcting 14b/20.mu.s CMOS A/D Converter, 1981 IEEE International Solid-State Circuits Conference, pp. 62 & 63.

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