Combination of a substrate and a wafer

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates

Reexamination Certificate

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Details

C438S456000, C438S458000, C438S459000

Reexamination Certificate

active

07910454

ABSTRACT:
The invention pertains to a combination of a substrate (6) and a wafer (15), wherein the substrate (6) and the wafer (15) are arranged parallel to one another and bonded together with the aid of an adhesive layer (8) situated between the substrate (6) and the wafer (15), and wherein the adhesive is chosen such that its adhesive properties are neutralized or at least diminished when a predetermined temperature is exceeded. According to the invention, the adhesive layer (8) is only applied annularly between the substrate (6) and the wafer (15) in the edge region of the wafer (15).

REFERENCES:
patent: 6090687 (2000-07-01), Merchant et al.
patent: 6462415 (2002-10-01), Ishiguri et al.
patent: 7497916 (2009-03-01), Hayashi et al.
patent: 2005/0236693 (2005-10-01), Kroninger et al.
patent: 103 40 409 (2005-04-01), None
patent: 102004018250 (2005-11-01), None
patent: 1 298 713 (2003-04-01), None
patent: 2004193237 (2004-07-01), None
patent: 2005123382 (2005-05-01), None
Austrian Search Report, Jan. 18, 2008.

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