Combination NAND-NOR memory device

Details Combination NAND-NOR memory device Combination NAND-NOR memory device

2005-11-22

2005-11-22

Mai, Son (Department: 2827)

Static information storage and retrieval

Floating gate

Particular connection

C365S185120, C365S185290

Reexamination Certificate

active

06967870

ABSTRACT:
An integrated circuit memory device has an array of non-floating gate non-volatile flash cells arranged in a NOR configuration. The device further has page buffers and control circuits to operate the array in either a NAND mode of operation or a NOR mode of operation. Finally, the array is partitionable by a user into two partitions such that one partition operates only in the NAND mode while the other partition operates only in a NOR mode.

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