Column redundancy scheme for DRAM using normal and redundant col

Details Column redundancy scheme for DRAM using normal and redundant col Column redundancy scheme for DRAM using normal and redundant col

1995-11-17

1998-01-13

Nelms, David C.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523003, 365200, 3652257, 371 103, G11C 700

Patent

active

057086192

ABSTRACT:
A random access memory comprising rowlines and columns crossing the rowlines, memory cells being associated with crossings of rowlines and columns; apparatus for connecting the memory cells to columns from voltage carried on the rowlines, the rowlines, columns and memory cells being arranged in more than two adjacent arrays; a column decoder providing access apparatus to columns in all the arrays; apparatus to disable the column access in any or all arrays and apparatus to enable a replacement spare column or columns using a spare column decoder in any or all of the arrays.

REFERENCES:
patent: 4807191 (1989-02-01), Flannagan
patent: 5272672 (1993-12-01), Ogihara
patent: 5325334 (1994-06-01), Roh et al.

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