Column redundancy device for semiconductor memory

Details Column redundancy device for semiconductor memory Column redundancy device for semiconductor memory

1995-06-07

1996-12-31

Nelms, David C.

Static information storage and retrieval

Addressing

Plural blocks or banks

365200, 365203, 365222, 3652257, G11C 700, G11C 800

Patent

active

055900852

ABSTRACT:
A column redundancy device for a semiconductor memory comprising a first fuse box for determining in response to a first row address signal whether a desired number of a plurality of cell array blocks are selected, a second fuse box for determining in response to a second row address signal and a first column address signal and an output signal from the first fuse box whether any one of the desired number of cell array blocks is selected, and a third fuse box for determining in response to a second column address signal and an output signal from the second fuse box whether any one of bit lines in the cell array block selected by one of the second row address signal and the first column address signal and the first row address signal is addressed and selectively driving any one of memory cells included in a redundancy cell array in accordance with the determined result.

REFERENCES:
patent: 4389715 (1983-06-01), Eaton, Jr. et al.

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