Column path circuit

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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Reexamination Certificate

active

07428186

ABSTRACT:
A column path circuit includes address transition detectors which detect level transition of page address signals, thereby outputting transition detection signals each having a predetermined enable period, respectively. A detection signal coupler logically operates on the transition detection signals respectively outputted from the address transition detectors, and outputs a signal representing the results of the logical operation. A ready signal generator outputs a strobe ready signal having a predetermined enable period in response to an enabled state of the signal outputted from the detection signal coupler. A strobe signal generator generates a read strobe signal and a page address strobe signal for latch of the page address signals in response to the strobe ready signal. Page address buffers are enabled by the page address strobe signal, and latch the page address signals, thereby buffering the page address signals, a page address decoder which decodes the buffered page address signals respectively outputted from the page address buffers. And, a column selection signal generator outputs column selection signals respectively corresponding to the decoded page address signals in response to the read strobe signal.

REFERENCES:
patent: 5768215 (1998-06-01), Kwon et al.
patent: 6005826 (1999-12-01), Ahn et al.
patent: 6111814 (2000-08-01), Schaefer
patent: 6389520 (2002-05-01), Christenson
patent: 6507534 (2003-01-01), Balluchi
patent: 6564284 (2003-05-01), Christenson
patent: 6631094 (2003-10-01), Ikeda
patent: 6801468 (2004-10-01), Lee
patent: 7057970 (2006-06-01), Kang
patent: 2004/0015663 (2004-01-01), Choi
patent: 2006/0227651 (2006-10-01), Lee

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