Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2002-05-30
2003-04-22
Elms, Richard (Department: 2824)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189020, C365S230020
Reexamination Certificate
active
06552952
ABSTRACT:
FIELD OF THE INVENTION
The present invention refers to the field of semiconductor memories and, in particular, to a selector or column multiplexer for semiconductor memories.
BACKGROUND OF THE INVENTION
As is known, for semiconductor memories the selection of a generic cell in the reading stage takes place by selecting the row to which the cell belongs to bring it to a selected potential and the column of the specific cell to connect it to a reading circuit. The reading circuit can, for example, perform current type reading of the cell. Selection of the column takes place via a suitable column multiplexer. In general, the column multiplexer comprises two input lines for supplying the two reading signals which, in the case of current reading, are composed of a sensing voltage and a ground voltage.
Furthermore, the multiplexer is provided with selective connection means necessary to select two specific column lines or bit lines among a plurality of column lines of the memory matrix to connect the two input lines to the two specific column lines. In conventional column multiplexers, transistors made, for example in MOSFET technology, are used to select the two specific column lines. The transistors have the gate terminal connected to a respective control line which has a level signal such as to activate or deactivate the transistor. The signal present on each control line is obtained by decoding an address signal.
It has been noted that, for particular applications, the functional characteristics and the architecture of conventional column multiplexers may not be satisfactory regarding both the complexity of managing the selection operations and concerning the overall dimensions when they are integrated into semiconductor structures. For example, it has been observed that, while for memories which adopt a so-called “NOR”, or “double T”, traditional structure, implementation of current reading of the memory cells using conventional multiplexers can be convenient, on the contrary for contactless and virtual ground memories, the limits of conventional multiplexers appear more significant.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a column multiplexer having additional functions compared to those known in the art so that it can be used efficiently for particular operational requirements.
The object of the present invention is achieved by a column multiplexer for a memory matrix having memory cells arranged in rows and columns. The multiplexer includes input lines for input signals, a plurality of output lines for electrical connection to the columns of the matrix, a selective connection device for selecting, in a first operation mode, at least one output line of the plurality of output lines in such a way as to connect it selectively to the input lines. In the first operation mode, the selective connection device selects a first group of output lines among the plurality of output lines, including at least three first lines.
REFERENCES:
patent: 4975877 (1990-12-01), Bell
patent: 5430685 (1995-07-01), Nakada
patent: 5448518 (1995-09-01), Jinbo
patent: 5450341 (1995-09-01), Sawada et al.
patent: 5513327 (1996-04-01), Farmwald et al.
patent: 6091667 (2000-07-01), Tanaka et al.
patent: 6122219 (2000-09-01), Zheng et al.
patent: 6181597 (2001-01-01), Nachumvosky
patent: 6377504 (2002-04-01), Hilbert
patent: 0 791 936 (1997-08-01), None
patent: 2 272 089 (1994-05-01), None
Abstract on the 1996 International Conference on Solid State Devices and Materials, Yokohama, 1996, pp. 269-271 entitled “A Novel NOR Virtual-Ground Array Architecture for High Density Flash”; XP 000694045.
TSAO et al.: “A 5V-Only 16M Flash Memory Using A Contactless Array of Source-side Injection Cells”, 1995 Symposium on VLSI Circuits, Kyoto, Jun. 8-10; pp. 77-78. XP000557809.
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Elms Richard
Jorgenson Lisa K.
Nguyen Tuan T.
STMicroelectronics S.r.l.
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