Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
1998-09-29
2002-09-17
Cheng, Joe H. (Department: 3713)
Metal working
Method of mechanical manufacture
Electrical device making
C029S825000, C029S829000, C029S830000, C029S840000, C029S846000, C029S847000, C228S165000
Reexamination Certificate
active
06449840
ABSTRACT:
TECHNICAL FIELD
The present invention relates to integrated circuits, and more particularly to solder bumped integrated circuit devices. Still more particularly, the present invention relates to a method of providing enhanced height bumps for bumped integrated circuit devices.
BACKGROUND OF THE INVENTION
Printed circuit boards (also referred to as printed wiring boards), hereinafter simply referred to as a “PCB”, have become ubiquitous. PCB's typically are in the form of a dielectric substrate (such as for example an organic resin reinforced by fibers) which is cladded on one or both sides with a conductor (such as for example copper). The dielectric substrate is provided with a predetermined pattern of perforations for making connections with wiring and electrical devices, wherein the conductor is patterned so as to provide a predetermined electrical routing between the perforations so that the wiring and electrical devices are functionally interconnected.
During the 1960's IBM Corporation developed an alternative technology to hardwiring all interfaces, referred to commonly as “controlled collapse chip connection” or simply “C4”. According to this technology, a chip is attached to the electronics of a PCB by matched contact of bumps on the chip with interface pads on the PCB. A chip provided with a series of bumps for C4 is referred to as a “flip chip”. The bumps are typically a solder alloy (for example lead 97%, tin 3%) deposited by a bump mask onto wettable bump pads, and the interface pads on the PCB are also wettable whereby electrical and mechanical interconnections are formed simultaneously by reflowing of the bumps. Advantages of this technology include the reflowing compensating for chip-to-substrate misalignment incurred during chip placement and for the bumps to absorb stress.
The bumps are deposited onto the bump pads using a bump mask which is then removed. At this stage, the bumps resemble a truncated cone, being widest at the bump pad. Thereafter, a non-oxidizing reflow process is applied to the bumps, whereafter the bumps are convexly shaped, resembling truncated egg-shapes.
While C4 technology may be used to provide bumps on the chip, as was detailed hereinabove, it is to be noted that C4 technology may be equally well practiced to provide bumps on the PCB, wherein the chip is provided with the interface pads.
Problematically, the conventional method for forming bumps is only suited to high volume manufacturing operations, and the height of the bumps is limited to 1.5 times the bump pad radius.
What remains needed in the art is a simple process which provides bump heights twice that available conventionally.
SUMMARY OF THE INVENTION
The present invention is a method for providing C4-type bumps which are higher than conventional C4 bumps.
The method according to the present invention proceeds, generally, as follows. A dielectric substrate, such as for example polyimide, is cladded on both sides with copper. At each prospective bump location, a via is provided through the cladded substrate, as for example by laser. Next, a copper core is deposited, preferably in the form of a solid copper core, at each via to thereby connect the two claddings, such as for example by electrolysis and electrolytic plating. Thereafter, a photoresist is applied to both claddings, a photomask having a predetermined exposure pattern is placed over the claddings, the photoresist is exposed to ultraviolet light to thereby polymerize in the exposed areas thereof, and the resulting photoresist image is developed by use of a developer solution to wash away of the unpolymerized areas of the photoresist. Now, the photoresist image provides a retainer wall spaced from, and circumferentially around, each via. Next, a solder alloy, such as lead-tin, is electroplated, such as by a lead-tin fluoroborate bath, into the volumes defined by the retainer wall at each end of the vias. Now, the photoresist is stripped, such as by an alkali stripper, from the cladding leaving behind a pair of protruding solder deposits at each via. Next, the copper cladding is etched away using an ammonia based etchant, wherein the solder deposits at each via are left intact. Finally, the solder deposits at each via are subjected to reflow, whereupon the solder deposits at each via form a pair of generally convexly shaped bumps interconnected through the copper core of the respective via.
Accordingly, it is an object of the present invention to provide C4-type bumps which have a height in excess of 1.5 times the bump pad radius.
It is an additional object of the present invention to provide a simple method for providing C4-type bumps without the use of a conventional bump mask.
These, and additional objects, advantages, features and benefits of the present invention will become apparent from the following specification.
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Le Bao
Schreiber Chris M.
Cheng Joe H.
Delphi Technologies Inc.
Nguyen Binh-An D.
Twomey Thomas N.
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