Television – Image signal processing circuitry specific to television – Chrominance-luminance signal separation
Reexamination Certificate
2001-05-25
2004-04-06
Hsia, Sherrie (Department: 2614)
Television
Image signal processing circuitry specific to television
Chrominance-luminance signal separation
C348S665000, C348S666000
Reexamination Certificate
active
06717623
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a color separator circuit for separating colors to reproduce chrominance signals from image signals and to a chrominance signal processing device provided with such a color separator circuit. The present invention relates particularly to a color separator circuit that performs color separation on image signals output from a solid-state image-sensing device and to a chrominance signal processing device provided with such a color separator circuit.
2. Description of the Prior Art
When chrominance signals are produced from image signals output from a solid-state image-sensing device, such as a single-panel color CCD (charge-coupled device) or a two-panel color CCD, that is provided with a plurality of types of color filters, from the image signals obtained for each type of color filter, signals that are supposed to be obtained for the other types of color filter than the one provided for the pixels that are currently yielding image signals are produced by interpolating neighboring image signals. Then, by using the signals thus produced by interpolation and the image signals output from the CCD, color separation is performed, then primary color signals, i.e. R (red), G (green), and B (blue) signals are produced, then color difference signals R−Y and B−Y are produced, and eventually chrominance signals are produced
FIG. 6
shows a conventional chrominance signal processing device that produces chrominance signals from image signals output from a CCD as described above. In the chrominance signal processing device shown in
FIG. 6
, when image signals are fed in from a CCD, they are fed to a line memory
51
and to an adder circuit
53
. The image signals output from the line memory
51
are fed to a line memory
52
and to a color separator circuit
55
, and the image signals output from the line memory
52
are fed to the adder circuit
53
. In this way, image signals from one row after another are stored in the line memory
51
and then in the line memory
52
. The adder circuit
53
is fed with the image signals of the first row from the line memory
52
and the image signals of the third row directly from the CCD, and the image signals added together by the adder circuit
53
then have their signal levels multiplied by ½ by a multiplier circuit
54
so that the image signals of the first and third rows are averaged. Then, the image signals output from the multiplier circuit
54
and the image signals of the second row output from the line memory
51
are fed to the color separator circuit
55
.
The color separator circuit
55
produces, for each image signal, three signals, namely a luminance signal YL and two color separation signals Cr and Cb, and feeds them to an RGB matrix circuit
56
. From the luminance signal YL and the color separation signals Cr and Cb, the RGB matrix circuit
56
produces primary color signals, namely R, G, and B signals, from which a color difference matrix circuit
57
then produces color difference signals R−Y and B−Y. These color difference signals R−Y and B−Y are fed to a color encoder
58
, which then produces and outputs chrominance signals.
The color separator circuit
55
is provided with color separation filters
59
and
60
for interpolating or correcting the image signals fed from the line memory
51
in the horizontal direction, color separation filters
61
and
62
for interpolating or correcting the image signals fed from the adder circuit
53
in the horizontal direction, an adder circuit
63
for adding together the outputs from the color separation filters
59
and
60
, a subtractor circuit
64
for calculating the difference between the outputs from the color separation filters
59
and
60
, an adder circuit
65
for adding together the outputs from the color separation filters
61
and
62
, a subtractor circuit
66
for calculating the difference between the outputs from the color separation filters
61
and
62
, and an adder circuit
67
for adding together the outputs of the adder circuits
63
and
65
.
Suppose that the chrominance signal processing device configured as described above is fed with image signals output from a CCD provided with four types of color filters, namely M (magenta), G (green), Y (yellow), and C (cyan) color filters, as shown at (a) in FIG.
3
. As shown at (a) in
FIG. 3
, the CCD has two types of columns of color filters arranged alternately, specifically columns in which color filters are arranged in the order of M, Y, G, and Y and columns in which color filters are arranged in the order of G, C, M, and C. Moreover, the CCD outputs image signals obtained from two adjacent rows in combination. Specifically, as shown at (b) in
FIG. 3
, for every two rows, the CCD outputs image signals M+Y, G+C, G+Y, and M+C.
Let these image signals be expressed also as C
1
=M+Y, C
2
=G+C, C
3
=G+Y, and C
4
=M+C, respectively. Where image signals are output in this way, the colors M, C, and Y are expressed, in terms of primary colors R (red), G (green), and B (blue), as M=R+B, C=G+B, and Y=R+G, respectively. Hence, the image signals C
1
, C
2
, C
3
, and C
4
are expressed, in terms of primary colors R, G, and B, as C
1
=
2
R+G+B, C
2
=
2
G+B, C
3
=
2
G+R, and C
4
=
2
B+G+R, respectively.
When image signals have been fed in in this way, for example, the chrominance signals for pixels that yield the image signals C
1
are produced in the following manner. First, the image signals C
1
and C
2
stored in the line memory
52
are fed to the color separation filters
59
and
60
. Thus, the color separation filters
59
and
60
output the interpolated or corrected image signals C
1
and C
2
. On the other hand, the image signals C
3
and C
4
fed directly from the CCD and the image signals C
3
and C
4
fed from the line memory
51
are averaged by the adder circuit
53
and the multiplier circuit
54
, and are then fed to the color separation filters
61
and
62
. Thus, the color separation filters
61
and
62
output the interpolated or corrected image signals C
3
and C
4
.
When the image signals C
2
to C
4
for the pixels that yield the image signals C
1
have been calculated plausibly in this way, the adder circuit
63
adds together the image signals C
1
and C
2
, and the subtractor circuit
64
calculates the differences between the image signals C
1
and C
2
. Simultaneously, the adder circuit
65
adds together the image signals C
3
and C
4
, and the subtractor circuit
66
calculates the differences between the image signals C
3
and C
4
. Then the outputs from the adder circuits
63
and
65
are added together by the adder circuit
67
to produce luminance signals YL, and the subtractor circuits
64
and
66
output color separation signals Cr and Cb, respectively. When the luminance signals YL and the color separation signals Cr and Cb have been produced in this way, the RGB matrix circuit
56
produces primary color signals, then the color difference matrix circuit
57
produces color difference signals, and then the color encoder
58
produces and outputs chrominance signals.
In the chrominance signal processing device shown in
FIG. 6
, the color separation filters
59
to
62
provided in the color separator circuit
55
thereof are each designed as a filter that performs calculation on three horizontally adjacent image signals, i.e. a target image signal and the image signals immediately preceding and succeeding it, with the color separation filters
59
and
61
given filtering characteristics (0, 2, 0) and the color separation filters
60
and
62
given filtering characteristics (1, 0, 1).
Suppose that a color separation filter is given filtering characteristics (a, b, c), that the image signal from the pixel for which the chrominance signals are currently being calculated has a signal level “cb”, and that
Mise Tetsuo
Mori Yukio
Okada Seiji
Arent Fox Kintner Plotkin & Kahn
Hsia Sherrie
Sanyo Electric Co,. Ltd.
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