Color lookup table blending

Details Color lookup table blending Color lookup table blending

1998-07-21

2001-07-10

Cuchlinski, Jr., William A. (Department: 3661)

Computer graphics processing and selective visual display system

Display peripheral interface input device

Light pen for fluid matrix display panel

C384S492000, C384S597000

Reexamination Certificate

active

06259439

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of video processing and in particular to the use of color lookup tables in the field of video processing.
BACKGROUND ART
Several formats have been presented for storing pixel data in a video subsystem. One approach is to provide twenty four bits of RGB information per pixel. This approach yields the maximum color space required for video at the cost of three bytes per pixel. Depending on the number of pixels in the video subsystem, the copy/scale operation could be overburdened by this.
A second approach is a compromise with the twenty four bit system. This approach is based on sixteen bits of RGB information per pixel. Systems of this nature require fewer bytes for the copy/scale operation but have the disadvantage of less color depth. Additionally, since the intensity and color information are encoded in the R, G and B components of the pixel, this approach does not take advantage of the human eye's sensitivity to intensity and insensitivity to color saturation. Other sixteen bit systems have also been proposed in which the pixels are encoded in a YUV format such as 6, 5, 5 and 8, 4, 4. Although these systems are somewhat better than the sixteen bit RGB approach, the sixteen bit YUV format does not come close to the performance of twenty bit systems.
Eight bit color lookup tables provide a third approach to this problem. This method uses eight bits per pixel as an index into a color map that typically has twenty bits of color space. This approach has the advantages of low byte count and while still providing twenty bit color space. However, there are only two hundred fifty six colors available on the screen in this approach and image quality may be somewhat poor.
Dithering techniques that use adjacent pixels to provide additional colors have been demonstrated to have excellent image quality, event for still images. However, these dithering techniques often require complicated algorithms and specialized palette entries in the digital-to-analog converter as well as almost exclusive use of the color lookup table. The overhead of running the dithering algorithm must be added to the copy/scale operation.
Motion video in some prior art systems is displayed in a 4:1:1 format called the “nine bit format”. The 4:1:1 notation indicates that there are four Y samples horizontally for each UV sample and four Y samples vertically for each UV sample. If each sample is eight bits then a 4×4 block of pixels uses eighteen bytes of information or nine bits per pixel. Although image quality is quite good for motion video the nine bit format may be unacceptable for display of high-quality stills. In addition, it was found that the nine bit format does not integrate well with graphics subsystems. Other variations of the YUV subsampled approach include an eight bit format.
Systems integrating a graphics subsystem display buffer with a video subsystem display buffer generally fall into two categories. The two types of approaches are known as single frame buffer architectures and dual frame buffer architectures. The single frame buffer architecture is the most straightforward approach and consists of a single graphics controller, a single digital-to-analog converter and a single frame buffer. In its simplest form, the single frame buffer architecture represents each pixel on the display by bits in the display buffer that are consistent in their format regardless of the meaning of the pixel on the display. Thus, graphics pixels and video pixels are indistinguishable in the frame buffer RAM. However, the single frame buffer architecture graphics/video systems, i.e. the single frame buffer architecture visual system, does not address the requirements of the video subsystem very well. Full screen motion video on the single frame buffer architecture visual system requires updating every pixel in the display buffer thirty times every second. In a typical system the display may be on the order of 1280×1024 by 8 bits. Even without the burden of writing over 30 M Bytes per second to the display buffer, it has been established that eight-bit video by itself does not provide the required video quality. This means the single frame buffer architecture system can either move up to sixteen bits per pixel or implement the eight bit YUV subsampled technique. Since sixteen bits per pixel will yield over 60 M Bytes per second into the frame buffer, it is clearly an unacceptable alternative.
A visual system must be able to mix video and graphics together on a display which requires the display to show on occasion a single video pixel located in between graphics pixels. Because of the need to mix video and graphics within a display every pixel in the display buffer must be a stand-alone, self-sustaining pixel on the screen. The nature of the eight bit YUV subsampled technique makes it necessary to have several eight bit samples before one video pixel can be generated, making the technique unsuitable for the single frame buffer architecture visual system.
The second category of architecture which integrates video and graphics is the dual frame buffer architecture. The dual frame buffer architecture visual system involves mixing two otherwise free-standing single frame buffer systems at the analog back end with a high-speed analog switch. Since the video and graphics subsystems are both single frame buffer designs each one can make the necessary tradeoffs in spatial resolution and pixel depth with almost complete disregard for the other subsystem. Dual frame buffer architecture visual systems also include the feature of being loosely-coupled. Since the only connection of the two systems is in the final output stage, the two subsystems can be on different buses in the system. The fact that the dual frame buffer architecture video subsystem is loosely-coupled to the graphics subsystem is usually the overriding reason such systems, which have significant disadvantages, are typically employed.
Dual frame buffer architecture designs typically operate in a mode that has the video subsystem genlocked to the graphics subsystem. Genlocked in this case means having both subsystems start to display their first pixel at the same time. If both subsystems are running at exactly the same horizontal line frequency with the same number of lines, then mixing of the two separate video streams can be done with very predictable results.
Since both pixel streams are running at the same time, the process can be thought of as having video pixels underlaying the graphics pixels. If a determination is made not to show a graphics pixel, then the video information will show through. In dual frame buffer architecture designs, it is not necessary for the two subsystems to have the same number of horizontal pixels. As an example, it is possible to have 352 video pixels underneath 1024 graphics pixels.
The decision whether to show the video information or the graphics information in dual frame buffer architecture visual systems is typically made on a pixel by pixel basis in the graphics subsystem. A technique often used is called chroma keying. Chroma keying involves detecting a specific color in the graphics digital pixel stream or a specific color entry in the color lookup table. Another approach uses the graphics analog pixel stream to detect black, since black is the easiest graphics level to detect. This approach is referred to as black detect. In either case, keying information is used to control the high-speed analog switch and the task of integrating video and graphics on the display is reduced to painting the keying color in the graphics display where video pixels are desired.
There are several disadvantages to dual frame buffer architecture visual systems. The goal of high-integration is often thwarted by the need to have two separate, free-standing subsystems. The cost of having duplicate digital-to-analog converters, display buffers, and cathode ray tube controllers is undesirable. The difficulty of genlocking and the cost of the high-speed analog switch are two mor

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