Color display apparatus

Computer graphics processing and selective visual display system – Display driving control circuitry – Intensity or color driving control

Reexamination Certificate

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Details

C345S694000

Reexamination Certificate

active

06326981

ABSTRACT:

FIELD OF THE INVENTION AND RELATED ART
The present invention relates to a color display apparatus for effecting multi-color display by combination of ON/OFF of neighboring sub-pixels.
Hitherto, various color display apparatus have been used, inclusive of a liquid crystal device (liquid crystal panel) aligned with a color filter and light-emitting device (LED).
FIG. 1
is a sectional view of an example of conventional liquid crystal panel structure. Referring to
FIG. 1
, a liquid crystal panel P
1
includes a pair of mutually oppositely disposed substrates
1
a
and
1
b
, which are applied to each other with a sealing member
2
to leave a gap that is filled with a liquid crystal
3
.
A surface of one substrate
1
a
is provided with a multiplicity of stripe-shaped scanning electrodes
9
a
which are coated with an insulating film
10
a
and an alignment film
11
a.
A surface of the other substrate
1
b
is provided with color filters or color filter segments
6
of three colors, i.e., R (red), G (green) and B (blue) arranged laterally, and these color filter segments
6
are coated with a protective film
7
. On the surface of the protective film
7
, a multiplicity of stripe-shaped data electrodes
9
b
are formed and are further coated with an insulating film
10
b
and an alignment film
11
b.
For convenience of expression herein, characters R, G and B are frequently used, including “R-color”, “G-color” and “B-color” representing respective colors; “R”, “G” and “B” representing characterization of respective sub-pixels; and “6R”, “6G” and “6B” representing color filters (or color filter segments) of respective colors.
The above-mentioned scanning electrodes
9
a
and data electrodes
9
b
are disposed so as to intersect each other to form a matrix electrode structure, and color filter segments 6R, 6G and 6B are respectively disposed one at each intersection of the electrodes so as to form sub-pixels R, G and B.
FIG. 2A
is a schematic plan view for illustrating an arrangement of sub-pixels R, G and B, scanning electrodes
9
a
and data electrodes
9
b
. As is understood from
FIG. 2A
, three sub-pixels R, G and B are sequentially disposed along each scanning electrode
9
a
to form one pixel (as shown in FIG.
2
B). The scanning electrodes
9
a
and data electrodes
9
b
are connected with respective drivers according to the TCP (tape carrier package) scheme or by bare chip loading so as to receive drive signals, whereby multi color display is effected by various combinations of ON/OFF of the sub-pixels R, G and B exhibiting respective colors.
FIGS. 2A and 2B
show a pixel arrangement example wherein the sub-pixels R, G and B are respectively formed in a vertically elongated rectangular shape and form an almost square pixel in combination. However, it is also known to form a pixel arrangement wherein sub-pixels R, G and B are respectively formed in a square shape as shown in FIG.
11
.
Known further pixel arrangements include one wherein four sub-pixels G, G, R and B are disposed as shown in
FIG. 12
, and one wherein four sub-pixels R, G, B and W (white) are disposed as shown in
FIG. 13
, which are inclusively called a quartet arrangement. The pixel arrangements shown in
FIGS. 12
an
13
are good in vertical-lateral balance and can thus provide an apparently improved resolution. Further, the pixel arrangement shown in
FIG. 13
can provide a display of an improved luminance because of a high transmittance at the sub-pixel W.
The display density of such a liquid crystal panel has generally been 80-100 dpi heretofore, but a higher resolution is desired in order to clearly display Japanese letters, particularly Chinese characters, and a minute graphic expression as used in CAD (computer-aided designing).
Some explanation will be made as to what a level of display density is desirable for a liquid crystal panel with reference to FIG.
3
.
FIG. 3
is a graph showing a visual resolution (capability of recognizing a contour), i.e., a relationship between a response value and a resolution (display density) of a panel in the case of reproducing pictures, such as texts, figures and photographic images. The response value is a measure of dot-recognizability so that a higher response value represents a clearer recognizability of discrete dots in a picture and a lower response value represents a state where a picture is recognized as a continuous one. A solid line in
FIG. 3
represents a relationship in the case of observation of a picture or image depicted on a reflection-type object in a distinct vision distance of 25 cm. The solid line shows that in the case of a reflective object, a display density of ca. 100 dpi provides a maximum response value so that individual dots can be recognized most clearly, and the response value remarkably lowers at a display density of 300 dpi or higher so that individual dots are hardly recognized. Thus, it is understood that a display density of 300 dpi or higher is required in order to provide a continuously recognizable image or picture. In view of these factors, a commercially available printer or digital copying machine is set to have a display density of 300-600 dpi, or 600-1000 dpi for a special use.
A similar relationship is found between a response value and a display density also in the case of a transmission-type object, such as a liquid crystal panel. However, as the distinct vision distance for a liquid crystal panel used as a monitor for a personal computer, a work station, etc. is ordinarily 30-50 cm, it is estimated that the characteristic curve is shifted from the solid line curve to a lower-resolution side as represented by a dashed line in FIG.
3
.
In view of such a dashed line-characteristic curve, it is estimated that a display density on the order of 300 dpi is preferable for a liquid crystal panel, and a display density on the order of 600 dpi is preferable for a high-resolution type panel.
A higher display density of a liquid crystal panel can be realized by a smaller pixel pitch which in turn can be realized by a smaller electrode arrangement pitch. However, in view of the necessity of driver loading according to the TCP scheme or bare chip loading scheme, the electrode pitch has to be a certain value or larger, thus posing a limitation in increase of display density.
For example, in order to dispose driver ICs according to the TCP scheme, an electrode pitch of at least ca. 60 &mgr;m is required, so that 180 &mgr;m (i.e., three times the electrode pitch) is required as a minimum pixel pitch in the case of a pixel arrangement wherein three sub-pixels R, G and B are arranged in a row for one pixel as shown in
FIG. 2
or FIG.
11
. By calculation, the minimum pixel pitch provides ca. 140 dpi as an upper limit of display density. In the case of bare chip loading, an electrode pitch smaller than 60 &mgr;m is allowed, but still a certain limit is posed in providing an increased display density.
A quartet arrangement as shown in
FIG. 12
or
FIG. 13
allows a pixel pitch of ca. 120 &mgr;m which is smaller than that in the case of
FIG. 2
but is still insufficient. Further, the arrangement shown in
FIG. 12
or
FIG. 13
uses a sub-pixel G or a sub-pixel W in addition to three sub-pixels of primary colors R, G and B, thus being accompanied with a difficulty of inferior color purity.
As another method of providing a higher display density, there is also known a so-called both-side loading scheme wherein driver ICs are disposed along a pair of mutually parallel edges of a liquid crystal panel. However, even by using this method, the display density can be increased to ca. two times at the most.
Now, if the number of pixels arranged in the direction of extension of a scanning electrode
9
a
is denoted by X and the number of pixels arranged in the direction of extension of a data electrode
9
b
is denoted by Y, the total number of data electrodes
9
b
is 3X and the total number of scanning electrodes
9
a
is Y, so that the driver ICs are required to have a number of channels which is equal to the total number N
0
(N
0
&e

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