Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1977-12-21
1979-05-22
Stern, Ronald J.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
350162SF, 427 43, G02B 518, G02B 2738
Patent
active
041556275
ABSTRACT:
Superposed fine-detail multi-level patterns (e.g., superposed diffraction gratings having specified line spacing dimensions less than 10 micrometers and specified depth dimensions less than 5 micrometers) can be fabricated by linearly adding (e.g., by evaporation) an additional two-level pattern to an existent multi-level pattern or, alternatively, by linearly subtracting (e.g., by sputter or plasma etching) an additional two-level pattern to an existent multi-level pattern.
REFERENCES:
patent: 2769111 (1956-10-01), Sadowsky
patent: 3771857 (1973-11-01), Thomasson et al.
patent: 3883232 (1975-05-01), Tsunoda
patent: 3911479 (1975-10-01), Sakurai
patent: 3957354 (1976-05-01), Knop
patent: 3981568 (1976-09-01), Bartolomei
Gale Michael T.
Lehmann Hans W.
Widmer Roland W.
Cohen Samuel
RCA Corporation
Seligsohn George J.
Stern Ronald J.
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