Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1999-02-26
2004-01-27
Nguyen, Steven H. D (Department: 2665)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S412000
Reexamination Certificate
active
06683879
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a collision control circuit for controlling a collision among processes or requests with respect to connections in an ATM (Asynchronous Transfer Mode) exchange, and in particular to a control circuit which manages timing of performing the processes.
2. Description of the Related Art
There has been a typical ATM exchange that accommodates a plurality of connections, in which cells pass along the plurality of connections, asynchronizing with each other. Since the transmission rates of the connections differ from each other and there randomly pass cells along the connections, the processes with respect to the cells or the connections arise at random.
In general, the frequency of processing cells passing through a connection is proportional to the transmission rate of the connection. Since the transmission rate of the connection is finite, the frequency of processing the cells is also finite. This gives a possibility of multiplexing in a unit process period for transmitting cells, processes of a plurality of cells. Herein, the unit process period is defined as the minimum period of time that the ATM exchange is capable of handling or manipulating with respect to processing cells, as shown in FIG.
9
.
For multiplexing the processes for cells, Japanese patent laid-open publication No. 7-327033 and No. 9-139741 have taught several multiplexing methods to manage cells passing through a plurality of connections. According to the methods, processes of the cells are registered into a time table, in which the processes are successively implemented pursuant to the time table.
As another multiplexing method, there has been a well-known method called round-robin, which alters the priorities of the processes. Pursuant to this method, processes of cells coming through connections having larger transmission rates require much time for completion of execution. Waiting time for the processes for the cells all of which come via a connection do not depend upon the transmission rate of the connection. Therefore, connections having larger transmission rates more decrease in throughput due to waiting time.
Using the arts described above, the processes with respect to the connections having large transmission rates decline in priority. Therefore, it is difficult to maintain or not to deteriorate the throughput of the connections having larger transmission rates in such an ATM exchange that also accommodates a number of connections each having lower transmission rates.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a collision control circuit for use in an ATM exchange which is capable of maintaining the transmission rates of connections having larger transmission rates.
According to one aspect of the present invention, there is provided an ATM exchange in which a plurality of connections are established and a plurality of processes with respect to the plurality of connections each having a transmission rate arise, the ATM exchange comprising: a priority computing circuit which computes a priority of a process, according to a transmission rate assigned a connection to which the process is associated; a priority comparing circuit which compares a plurality of priorities corresponding to the plurality of processes to select a process having a higher priority among the plurality of processes; and a processing circuit which carries out the selected process.
According to another aspect of the present invention, there is provided an ATM exchange in which a plurality of connections are established and a plurality of processes with respect to the plurality of connections each having a transmission rate arise, the ATM exchange comprising: a priority computing circuit which computes a priority of a process, according to an updating frequency of priority assigned to a connection to which the process is associated; a priority comparing circuit which compares a plurality of priorities corresponding to the plurality of processes to select a process having a higher priority among the plurality of processes; and a processing circuit which carries out the selected process.
According to still another aspect of the present invention, there is provided an ATM exchange in which a plurality of connections are established and a plurality of processes with respect to the plurality of connections each having a transmission rate arise, the ATM exchange comprising: a plurality of queues which each register processes; a priority computing circuit which computes a priority of a process, according to the sum of a plurality of transmission rates assigned to connections associated with the registered processes; a priority comparing circuit which compares a plurality of priorities corresponding to the plurality of processes to select a process having a higher priority among the plurality of processes; and a processing circuit which carries out the selected process.
According to a further aspect of the present invention, there is provided an ATM exchange in which a plurality of connections are established and a plurality of processes with respect to the plurality of connections each having a transmission rate arise, the ATM exchange comprising: a plurality of queues which each register processes; a priority computing circuit which computes a priority of a process, according to the number of the registered processes; a priority comparing circuit which compares a plurality of priorities corresponding to the plurality of processes to select a process having a higher priority among the plurality of processes; and a processing circuit which carries out the selected process.
According to still another aspect of the present invention, there is provided an ATM exchange in which a plurality of connections are established and a plurality of processes with respect to the plurality of connections each having a transmission rate arise, the ATM exchange comprising: a plurality of queues which each register processes; a priority computing circuit which computes a priority of a process, according to the weight assigned to the queue registering the processes; a priority comparing circuit which compares a plurality of priorities corresponding to the plurality of processes to select a process having a higher priority among the plurality of processes; and a processing circuit which carries out the selected process.
According to yet a further aspect of the present invention, there is provided an ATM exchange in which a plurality of connections are established and a plurality of processes with respect to the plurality of connections each having a transmission rate arise, the ATM exchange comprising: a plurality of queues which register processes; a control circuit which selects a process having a higher priority among the plurality of processes, pursuant to a pattern indicating the order of the plurality of processes regulated on the basis of the transmission rates of the plurality of queues.
REFERENCES:
patent: 5533020 (1996-07-01), Byrn et al.
patent: 5757771 (1998-05-01), Li et al.
patent: 5774453 (1998-06-01), Fukano et al.
patent: 5818818 (1998-10-01), Soumiya et al.
patent: 5909443 (1999-06-01), Fichou et al.
patent: 5917804 (1999-06-01), Shah et al.
patent: 5983278 (1999-11-01), Chong et al.
patent: 5991295 (1999-11-01), Tout et al.
patent: 6009078 (1999-12-01), Sato
patent: 6011779 (2000-01-01), Wills
patent: 6137779 (2000-10-01), Miller et al.
patent: 6157614 (2000-12-01), Pasternak et al.
patent: 6198724 (2001-03-01), Lam et al.
patent: 6229789 (2001-05-01), Simpson et al.
patent: 6229812 (2001-05-01), Parruck et al.
patent: 6359862 (2002-03-01), Jeffries et al.
patent: 7-327033 (1995-12-01), None
patent: 9-139741 (1997-05-01), None
Nguyen Phuongchau Ba
Oki Electric Industry Co. Ltd.
Sartori Michael A.
Venable LLP
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