Patent
1989-11-03
1991-02-12
James, Andrew J.
357 35, 357 49, 357 55, 357 59, H01L 2972, H01L 2712, H01L 2906
Patent
active
049928430
ABSTRACT:
A collector contact (6) is fabricated which is attached on the side to the collector zone (1), and around which a moat (3) is produced which laterally restricts the collector zone (1). The depth of the moat (3) is so dimensioned to be at least equal to the vertical thickness of the collector zone (1). The collector contact (6) comprises a polycrystalline silicon layer which contains dopants of the same conductivity type as the collector zone (1), and covers a highly doped contacting zone (7') which has been diffused from the adjoining collector contact (6).
REFERENCES:
patent: 4339767 (1982-07-01), Horng et al.
patent: 4674173 (1987-06-01), Hahn et al.
patent: 4711017 (1987-12-01), Lammert
patent: 4733287 (1988-03-01), Bower
patent: 4769687 (1988-09-01), Nakazato et al.
Wieder, "Processing for a Lateral PNP Transistor in the Submicron Range", IBM Technical Disclosure Bulletin, vol. 21, No. 10, Mar. 1979.
Konsumelektronik "Fur Technologisch Interessierte: V-Groove-ProzeB", 10/18.5, 1984, pp. 68-69.
Blossfeld Lothar
Volz Christoph
Deutsche ITT Industries GmbH
James Andrew J.
Ngo Ngan Van
Peterson Thomas L.
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